1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2007-2011 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun * Authors: York Sun <yorksun@freescale.com>
4*4882a593Smuzhiyun * Timur Tabi <timur@freescale.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * FSL DIU Framebuffer driver
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <command.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun #include <fsl_diu_fb.h>
15*4882a593Smuzhiyun #include "../common/pixis.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define PX_BRDCFG0_DLINK 0x10
18*4882a593Smuzhiyun #define PX_BRDCFG0_DVISEL 0x08
19*4882a593Smuzhiyun
diu_set_pixel_clock(unsigned int pixclock)20*4882a593Smuzhiyun void diu_set_pixel_clock(unsigned int pixclock)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
23*4882a593Smuzhiyun volatile ccsr_gur_t *gur = &immap->im_gur;
24*4882a593Smuzhiyun volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
25*4882a593Smuzhiyun unsigned long speed_ccb, temp, pixval;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun speed_ccb = get_bus_freq(0);
28*4882a593Smuzhiyun temp = 1000000000/pixclock;
29*4882a593Smuzhiyun temp *= 1000;
30*4882a593Smuzhiyun pixval = speed_ccb / temp;
31*4882a593Smuzhiyun debug("DIU pixval = %lu\n", pixval);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* Modify PXCLK in GUTS CLKDVDR */
34*4882a593Smuzhiyun debug("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
35*4882a593Smuzhiyun temp = *guts_clkdvdr & 0x2000FFFF;
36*4882a593Smuzhiyun *guts_clkdvdr = temp; /* turn off clock */
37*4882a593Smuzhiyun *guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16);
38*4882a593Smuzhiyun debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
platform_diu_init(unsigned int xres,unsigned int yres,const char * port)41*4882a593Smuzhiyun int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun const char *name;
44*4882a593Smuzhiyun int gamma_fix = 0;
45*4882a593Smuzhiyun u32 pixel_format = 0x88883316;
46*4882a593Smuzhiyun u8 temp;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun temp = in_8(&pixis->brdcfg0);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun if (strncmp(port, "dlvds", 5) == 0) {
51*4882a593Smuzhiyun /* Dual link LVDS */
52*4882a593Smuzhiyun gamma_fix = 1;
53*4882a593Smuzhiyun temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL);
54*4882a593Smuzhiyun name = "Dual-Link LVDS";
55*4882a593Smuzhiyun } else if (strncmp(port, "lvds", 4) == 0) {
56*4882a593Smuzhiyun /* Single link LVDS */
57*4882a593Smuzhiyun temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK;
58*4882a593Smuzhiyun name = "Single-Link LVDS";
59*4882a593Smuzhiyun } else {
60*4882a593Smuzhiyun /* DVI */
61*4882a593Smuzhiyun if (in_8(&pixis->ver) == 1) /* Board version */
62*4882a593Smuzhiyun pixel_format = 0x88882317;
63*4882a593Smuzhiyun temp |= PX_BRDCFG0_DVISEL;
64*4882a593Smuzhiyun name = "DVI";
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
68*4882a593Smuzhiyun out_8(&pixis->brdcfg0, temp);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun return fsl_diu_init(xres, yres, pixel_format, gamma_fix);
71*4882a593Smuzhiyun }
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