1*4882a593SmuzhiyunFreescale MPC8610HPCD board 2*4882a593Smuzhiyun=========================== 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunBuilding U-Boot 6*4882a593Smuzhiyun--------------- 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun $ make MPC8610HPCD_config 9*4882a593Smuzhiyun Configuring for MPC8610HPCD board... 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun $ make 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunFlashing U-Boot 15*4882a593Smuzhiyun--------------- 16*4882a593SmuzhiyunThe flash is 128M starting at 0xF800_0000. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunThe alternate image is at 0xFBF0_0000 19*4882a593SmuzhiyunThe boot image is at 0xFFF0_0000. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunTo Flash U-Boot into the booting bank: 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun tftp 1000000 u-boot.bin 25*4882a593Smuzhiyun protect off all 26*4882a593Smuzhiyun erase fff00000 +$filesize 27*4882a593Smuzhiyun cp.b 1000000 fff00000 $filesize 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunTo Flash U-Boot into the alternate bank 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun tftp 1000000 u-boot.bin 33*4882a593Smuzhiyun erase fbf00000 +$filesize 34*4882a593Smuzhiyun cp.b 1000000 fbf00000 $filesize 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun 37*4882a593Smuzhiyunpixis_reset command 38*4882a593Smuzhiyun------------------- 39*4882a593SmuzhiyunA new command, "pixis_reset", is introduced to reset mpc8610hpcd board 40*4882a593Smuzhiyunusing the FPGA sequencer. When the board restarts, it has the option 41*4882a593Smuzhiyunof using either the current or alternate flash bank as the boot 42*4882a593Smuzhiyunimage, with or without the watchdog timer enabled, and finally with 43*4882a593Smuzhiyunor without frequency changes. 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunUsage is; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun pixis_reset 48*4882a593Smuzhiyun pixis_reset altbank 49*4882a593Smuzhiyun pixis_reset altbank wd 50*4882a593Smuzhiyun pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> 51*4882a593Smuzhiyun pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> 52*4882a593Smuzhiyun 53*4882a593SmuzhiyunExamples; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* reset to current bank, like "reset" command */ 56*4882a593Smuzhiyun pixis_reset 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* reset board but use the to alternate flash bank */ 59*4882a593Smuzhiyun pixis_reset altbank 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* reset board, use alternate flash bank with watchdog timer enabled*/ 62*4882a593Smuzhiyun pixis_reset altbank wd 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* reset board to alternate bank with frequency changed. 65*4882a593Smuzhiyun * 40 is SYSCLK, 2.5 is COREPLL ratio, 10 is MPXPLL ratio 66*4882a593Smuzhiyun */ 67*4882a593Smuzhiyun pixis-reset altbank cf 40 2.5 10 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunDIP Switch Settings 71*4882a593Smuzhiyun------------------- 72*4882a593SmuzhiyunTo manually switch the flash banks using the DIP switch 73*4882a593Smuzhiyunsettings, toggle both SW6:1 and SW6:2. 74