xref: /OK3568_Linux_fs/u-boot/board/freescale/mpc8541cds/law.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2008 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * (C) Copyright 2000
5*4882a593Smuzhiyun  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <asm/fsl_law.h>
12*4882a593Smuzhiyun #include <asm/mmu.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun  * LAW(Local Access Window) configuration:
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  * 0x0000_0000     0x7fff_ffff     DDR                     2G
18*4882a593Smuzhiyun  * 0x8000_0000     0x9fff_ffff     PCI1 MEM                512M
19*4882a593Smuzhiyun  * 0xa000_0000     0xbfff_ffff     PCI2 MEM                512M
20*4882a593Smuzhiyun  * 0xe000_0000     0xe000_ffff     CCSR                    1M
21*4882a593Smuzhiyun  * 0xe200_0000     0xe20f_ffff     PCI1 IO                 1M
22*4882a593Smuzhiyun  * 0xe210_0000     0xe21f_ffff     PCI2 IO                 1M
23*4882a593Smuzhiyun  * 0xf000_0000     0xf7ff_ffff     SDRAM                   128M
24*4882a593Smuzhiyun  * 0xf800_0000     0xf80f_ffff     NVRAM/CADMUS (*)        1M
25*4882a593Smuzhiyun  * 0xff00_0000     0xff7f_ffff     FLASH (2nd bank)        8M
26*4882a593Smuzhiyun  * 0xff80_0000     0xffff_ffff     FLASH (boot bank)       8M
27*4882a593Smuzhiyun  *
28*4882a593Smuzhiyun  * Notes:
29*4882a593Smuzhiyun  *    CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
30*4882a593Smuzhiyun  *    If flash is 8M at default position (last 8M), no LAW needed.
31*4882a593Smuzhiyun  */
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun struct law_entry law_table[] = {
34*4882a593Smuzhiyun 	SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
35*4882a593Smuzhiyun 	SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
36*4882a593Smuzhiyun 	SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI),
37*4882a593Smuzhiyun 	SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2),
38*4882a593Smuzhiyun 	/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
39*4882a593Smuzhiyun 	SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun int num_law_entries = ARRAY_SIZE(law_table);
43