1*4882a593SmuzhiyunFreescale MPC837xEMDS Board 2*4882a593Smuzhiyun----------------------------------------- 3*4882a593Smuzhiyun1. Board Switches and Jumpers 4*4882a593Smuzhiyun1.0 There are four Dual-In-Line Packages(DIP) Switches on MPC837xEMDS board 5*4882a593Smuzhiyun For some reason, the HW designers describe the switch settings 6*4882a593Smuzhiyun in terms of 0 and 1, and then map that to physical switches where 7*4882a593Smuzhiyun the label "On" refers to logic 0 and "Off" is logic 1. 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun Switch bits are numbered 1 through, like, 4 6 8 or 10, but the 10*4882a593Smuzhiyun bits may contribute to signals that are numbered based at 0, 11*4882a593Smuzhiyun and some of those signals may be high-bit-number-0 too. Heed 12*4882a593Smuzhiyun well the names and labels and do not get confused. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun "Off" == 1 15*4882a593Smuzhiyun "On" == 0 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun SW4[8] is the bit labeled 8 on Switch 4. 18*4882a593Smuzhiyun SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2. 19*4882a593Smuzhiyun SW2[1:8]= 0000_0001 refers to bits labeled 1 through 7 is set as "On" 20*4882a593Smuzhiyun and bits labeled 8 is set as "Off". 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun1.1 For the MPC837xEMDS Processor Board 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun First, make sure the board default setting is consistent with the 25*4882a593Smuzhiyun document shipped with your board. Then apply the following setting: 26*4882a593Smuzhiyun SW3[1-8]= 0011_0000 (BOOTSEQ, ROMLOC setting) 27*4882a593Smuzhiyun SW4[1-8]= 0000_0110 (core PLL setting) 28*4882a593Smuzhiyun SW5[1-8]= 1001_1000 (system PLL, boot up from low end of flash) 29*4882a593Smuzhiyun SW6[1-8]= 0000_1000 (HRCW is read from NOR FLASH) 30*4882a593Smuzhiyun SW7[1-8]= 0110_1101 (TSEC1/2 interface setting - RGMII) 31*4882a593Smuzhiyun J3 2-3, TSEC1 LVDD1 with 2.5V 32*4882a593Smuzhiyun J6 2-3, TSEC2 LVDD2 with 2.5V 33*4882a593Smuzhiyun J9 2-3, CLKIN from osc on board 34*4882a593Smuzhiyun J10 removed, CS0 connect to NOR flash; when mounted, CS0 connect to NAND 35*4882a593Smuzhiyun J11 removed, Hardware Reset Configuration Word load from FLASH(NOR or NAND) 36*4882a593Smuzhiyun mounted, HRCW load from BCSR. 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun on board Oscillator: 66M 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun2. Memory Map 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun2.1. The memory map should look pretty much like this: 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun 0x0000_0000 0x7fff_ffff DDR 2G 45*4882a593Smuzhiyun 0x8000_0000 0x8fff_ffff PCI MEM prefetch 256M 46*4882a593Smuzhiyun 0x9000_0000 0x9fff_ffff PCI MEM non-prefetch 256M 47*4882a593Smuzhiyun 0xc000_0000 0xdfff_ffff Empty 512M 48*4882a593Smuzhiyun 0xe000_0000 0xe00f_ffff Int Mem Reg Space 1M 49*4882a593Smuzhiyun 0xe010_0000 0xe02f_ffff Empty 2M 50*4882a593Smuzhiyun 0xe030_0000 0xe03f_ffff PCI IO 1M 51*4882a593Smuzhiyun 0xe040_0000 0xe05f_ffff Empty 2M 52*4882a593Smuzhiyun 0xe060_0000 0xe060_7fff NAND Flash 32K 53*4882a593Smuzhiyun 0xf400_0000 0xf7ff_ffff Empty 64M 54*4882a593Smuzhiyun 0xf800_0000 0xf800_7fff BCSR on CS1 32K 55*4882a593Smuzhiyun 0xfe00_0000 0xffff_ffff NOR Flash on CS0 32M 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun3. Definitions 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun3.1 Explanation of NEW definitions in: 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun include/configs/MPC837XEMDS.h 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun CONFIG_MPC83xx MPC83xx family for both MPC837x and MPC8360 64*4882a593Smuzhiyun CONFIG_MPC837x MPC837x specific 65*4882a593Smuzhiyun CONFIG_MPC837XEMDS MPC837XEMDS board specific 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun4. Compilation 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun Assuming you're using BASH shell: 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun export CROSS_COMPILE=your-cross-compile-prefix 72*4882a593Smuzhiyun cd u-boot 73*4882a593Smuzhiyun make distclean 74*4882a593Smuzhiyun make MPC837XEMDS_config 75*4882a593Smuzhiyun make 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun5. Downloading and Flashing Images 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun5.0 Download over serial line using Kermit: 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun loadb 82*4882a593Smuzhiyun [Drop to kermit: 83*4882a593Smuzhiyun ^\c 84*4882a593Smuzhiyun send <u-boot-bin-image> 85*4882a593Smuzhiyun c 86*4882a593Smuzhiyun ] 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun Or via tftp: 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun tftp 40000 u-boot.bin 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun5.1 Reflash U-Boot Image using U-Boot 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun tftp 40000 u-boot.bin 96*4882a593Smuzhiyun protect off fe000000 fe1fffff 97*4882a593Smuzhiyun erase fe000000 fe1fffff 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun cp.b 40000 fe000000 xxxx 100*4882a593Smuzhiyun 101*4882a593SmuzhiyunYou have to supply the correct byte count with 'xxxx' from the TFTP result log. 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun6. Notes 104*4882a593Smuzhiyun 1) The console baudrate for MPC837XEMDS is 115200bps. 105