1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2000-2003
3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
6*4882a593Smuzhiyun * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <config.h>
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <pci.h>
14*4882a593Smuzhiyun #include <asm/immap.h>
15*4882a593Smuzhiyun #include <asm/io.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
18*4882a593Smuzhiyun
checkboard(void)19*4882a593Smuzhiyun int checkboard(void)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun puts("Board: ");
22*4882a593Smuzhiyun puts("Freescale FireEngine 5485 EVB\n");
23*4882a593Smuzhiyun return 0;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
dram_init(void)26*4882a593Smuzhiyun int dram_init(void)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun siu_t *siu = (siu_t *) (MMAP_SIU);
29*4882a593Smuzhiyun sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
30*4882a593Smuzhiyun u32 dramsize, i;
31*4882a593Smuzhiyun #ifdef CONFIG_SYS_DRAMSZ1
32*4882a593Smuzhiyun u32 temp;
33*4882a593Smuzhiyun #endif
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun out_be32(&siu->drv, CONFIG_SYS_SDRAM_DRVSTRENGTH);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
38*4882a593Smuzhiyun for (i = 0x13; i < 0x20; i++) {
39*4882a593Smuzhiyun if (dramsize == (1 << i))
40*4882a593Smuzhiyun break;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun i--;
43*4882a593Smuzhiyun out_be32(&siu->cs0cfg, CONFIG_SYS_SDRAM_BASE | i);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #ifdef CONFIG_SYS_DRAMSZ1
46*4882a593Smuzhiyun temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
47*4882a593Smuzhiyun for (i = 0x13; i < 0x20; i++) {
48*4882a593Smuzhiyun if (temp == (1 << i))
49*4882a593Smuzhiyun break;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun i--;
52*4882a593Smuzhiyun dramsize += temp;
53*4882a593Smuzhiyun out_be32(&siu->cs1cfg, (CONFIG_SYS_SDRAM_BASE + temp) | i);
54*4882a593Smuzhiyun #endif
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
57*4882a593Smuzhiyun out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* Issue PALL */
60*4882a593Smuzhiyun out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /* Issue LEMR */
63*4882a593Smuzhiyun out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
64*4882a593Smuzhiyun out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun udelay(500);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* Issue PALL */
69*4882a593Smuzhiyun out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* Perform two refresh cycles */
72*4882a593Smuzhiyun out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
73*4882a593Smuzhiyun out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun out_be32(&sdram->ctrl,
78*4882a593Smuzhiyun (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun udelay(100);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun gd->ram_size = dramsize;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return 0;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
testdram(void)87*4882a593Smuzhiyun int testdram(void)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun /* TODO: XXX XXX XXX */
90*4882a593Smuzhiyun printf("DRAM test not implemented!\n");
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return (0);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun #if defined(CONFIG_PCI)
96*4882a593Smuzhiyun /*
97*4882a593Smuzhiyun * Initialize PCI devices, report devices found.
98*4882a593Smuzhiyun */
99*4882a593Smuzhiyun static struct pci_controller hose;
100*4882a593Smuzhiyun extern void pci_mcf547x_8x_init(struct pci_controller *hose);
101*4882a593Smuzhiyun
pci_init_board(void)102*4882a593Smuzhiyun void pci_init_board(void)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun pci_mcf547x_8x_init(&hose);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun #endif /* CONFIG_PCI */
107