xref: /OK3568_Linux_fs/u-boot/board/freescale/m54418twr/sbf_dram_init.S (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Board-specific sbf ddr/sdram init.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun.global sbf_dram_init
10*4882a593Smuzhiyun.text
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunsbf_dram_init:
13*4882a593Smuzhiyun	move.l	#0xFC04002D, %a1
14*4882a593Smuzhiyun	move.b	#46, (%a1)		/* DDR */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	/* slew settings */
17*4882a593Smuzhiyun	move.l	#0xEC094060, %a1
18*4882a593Smuzhiyun	move.b	#0, (%a1)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	/* use vco instead of cpu*2 clock for ddr clock */
21*4882a593Smuzhiyun	move.l	#0xEC09001A, %a1
22*4882a593Smuzhiyun	move.w	#0xE01D, (%a1)
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	/* DDR settings */
25*4882a593Smuzhiyun	move.l	#0xFC0B8180, %a1
26*4882a593Smuzhiyun	move.l	#0x00000000, (%a1)
27*4882a593Smuzhiyun	move.l	#0x40000000, (%a1)
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	move.l	#0xFC0B81AC, %a1
30*4882a593Smuzhiyun	move.l	#0x01030203, (%a1)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	move.l	#0xFC0B8000, %a1
33*4882a593Smuzhiyun	move.l	#0x01010101, (%a1)+	/* 0x00 */
34*4882a593Smuzhiyun	move.l	#0x00000101, (%a1)+	/* 0x04 */
35*4882a593Smuzhiyun	move.l	#0x01010100, (%a1)+	/* 0x08 */
36*4882a593Smuzhiyun	move.l	#0x01010000, (%a1)+	/* 0x0C */
37*4882a593Smuzhiyun	move.l	#0x00010101, (%a1)+	/* 0x10 */
38*4882a593Smuzhiyun	move.l	#0xFC0B8018, %a1
39*4882a593Smuzhiyun	move.l	#0x00010100, (%a1)+	/* 0x18 */
40*4882a593Smuzhiyun	move.l	#0x00000001, (%a1)+	/* 0x1C */
41*4882a593Smuzhiyun	move.l	#0x01000001, (%a1)+	/* 0x20 */
42*4882a593Smuzhiyun	move.l	#0x00000100, (%a1)+	/* 0x24 */
43*4882a593Smuzhiyun	move.l	#0x00010001, (%a1)+	/* 0x28 */
44*4882a593Smuzhiyun	move.l	#0x00000200, (%a1)+	/* 0x2C */
45*4882a593Smuzhiyun	move.l	#0x01000002, (%a1)+	/* 0x30 */
46*4882a593Smuzhiyun	move.l	#0x00000000, (%a1)+	/* 0x34 */
47*4882a593Smuzhiyun	move.l	#0x00000100, (%a1)+	/* 0x38 */
48*4882a593Smuzhiyun	move.l	#0x02000100, (%a1)+	/* 0x3C */
49*4882a593Smuzhiyun	move.l	#0x02000407, (%a1)+	/* 0x40 */
50*4882a593Smuzhiyun	move.l	#0x02030007, (%a1)+	/* 0x44 */
51*4882a593Smuzhiyun	move.l	#0x02000100, (%a1)+	/* 0x48 */
52*4882a593Smuzhiyun	move.l	#0x0A030203, (%a1)+	/* 0x4C */
53*4882a593Smuzhiyun	move.l	#0x00020708, (%a1)+	/* 0x50 */
54*4882a593Smuzhiyun	move.l	#0x00050008, (%a1)+	/* 0x54 */
55*4882a593Smuzhiyun	move.l	#0x04030002, (%a1)+	/* 0x58 */
56*4882a593Smuzhiyun	move.l	#0x00000004, (%a1)+	/* 0x5C */
57*4882a593Smuzhiyun	move.l	#0x020A0000, (%a1)+	/* 0x60 */
58*4882a593Smuzhiyun	move.l	#0x0C00000E, (%a1)+	/* 0x64 */
59*4882a593Smuzhiyun	move.l	#0x00002004, (%a1)+	/* 0x68 */
60*4882a593Smuzhiyun	move.l	#0x00000000, (%a1)+	/* 0x6C */
61*4882a593Smuzhiyun	move.l	#0x00100010, (%a1)+	/* 0x70 */
62*4882a593Smuzhiyun	move.l	#0x00100010, (%a1)+	/* 0x74 */
63*4882a593Smuzhiyun	move.l	#0x00000000, (%a1)+	/* 0x78 */
64*4882a593Smuzhiyun	move.l	#0x07990000, (%a1)+	/* 0x7C */
65*4882a593Smuzhiyun	move.l	#0xFC0B80A0, %a1
66*4882a593Smuzhiyun	move.l	#0x00000000, (%a1)+	/* 0xA0 */
67*4882a593Smuzhiyun	move.l	#0x00C80064, (%a1)+	/* 0xA4 */
68*4882a593Smuzhiyun	move.l	#0x44520002, (%a1)+	/* 0xA8 */
69*4882a593Smuzhiyun	move.l	#0x00C80023, (%a1)+	/* 0xAC */
70*4882a593Smuzhiyun	move.l	#0xFC0B80B4, %a1
71*4882a593Smuzhiyun	move.l	#0x0000C350, (%a1)	/* 0xB4 */
72*4882a593Smuzhiyun	move.l	#0xFC0B80E0, %a1
73*4882a593Smuzhiyun	move.l	#0x04000000, (%a1)+	/* 0xE0 */
74*4882a593Smuzhiyun	move.l	#0x03000304, (%a1)+	/* 0xE4 */
75*4882a593Smuzhiyun	move.l	#0x40040000, (%a1)+	/* 0xE8 */
76*4882a593Smuzhiyun	move.l	#0xC0004004, (%a1)+	/* 0xEC */
77*4882a593Smuzhiyun	move.l	#0x0642C000, (%a1)+	/* 0xF0 */
78*4882a593Smuzhiyun	move.l	#0x00000642, (%a1)+	/* 0xF4 */
79*4882a593Smuzhiyun	move.l	#0xFC0B8024, %a1
80*4882a593Smuzhiyun	tpf
81*4882a593Smuzhiyun	move.l	#0x01000100, (%a1)	/* 0x24 */
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	move.l	#0x2000, %d1
84*4882a593Smuzhiyun	bsr	asm_delay
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	rts
87