1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2010-2012 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <spi.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/immap.h>
12*4882a593Smuzhiyun #include <mmc.h>
13*4882a593Smuzhiyun #include <fsl_esdhc.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun
checkboard(void)17*4882a593Smuzhiyun int checkboard(void)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun /*
20*4882a593Smuzhiyun * need to to:
21*4882a593Smuzhiyun * Check serial flash size. if 2mb evb, else 8mb demo
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun puts("Board: ");
24*4882a593Smuzhiyun puts("Freescale MCF54418 Tower System\n");
25*4882a593Smuzhiyun return 0;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
dram_init(void)28*4882a593Smuzhiyun int dram_init(void)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun u32 dramsize;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #if defined(CONFIG_SERIAL_BOOT)
33*4882a593Smuzhiyun /*
34*4882a593Smuzhiyun * Serial Boot: The dram is already initialized in start.S
35*4882a593Smuzhiyun * only require to return DRAM size
36*4882a593Smuzhiyun */
37*4882a593Smuzhiyun dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
38*4882a593Smuzhiyun #else
39*4882a593Smuzhiyun sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
40*4882a593Smuzhiyun ccm_t *ccm = (ccm_t *)MMAP_CCM;
41*4882a593Smuzhiyun gpio_t *gpio = (gpio_t *) MMAP_GPIO;
42*4882a593Smuzhiyun pm_t *pm = (pm_t *) MMAP_PM;
43*4882a593Smuzhiyun u32 i;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun for (i = 0x13; i < 0x20; i++) {
48*4882a593Smuzhiyun if (dramsize == (1 << i))
49*4882a593Smuzhiyun break;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun out_8(&pm->pmcr0, 0x2E);
53*4882a593Smuzhiyun out_8(&gpio->mscr_sdram, 1);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun clrbits_be16(&ccm->misccr2, CCM_MISCCR2_FBHALF);
56*4882a593Smuzhiyun setbits_be16(&ccm->misccr2, CCM_MISCCR2_DDR2CLK);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun out_be32(&sdram->rcrcr, 0x40000000);
59*4882a593Smuzhiyun out_be32(&sdram->padcr, 0x01030203);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun out_be32(&sdram->cr00, 0x01010101);
62*4882a593Smuzhiyun out_be32(&sdram->cr01, 0x00000101);
63*4882a593Smuzhiyun out_be32(&sdram->cr02, 0x01010100);
64*4882a593Smuzhiyun out_be32(&sdram->cr03, 0x01010000);
65*4882a593Smuzhiyun out_be32(&sdram->cr04, 0x00010101);
66*4882a593Smuzhiyun out_be32(&sdram->cr06, 0x00010100);
67*4882a593Smuzhiyun out_be32(&sdram->cr07, 0x00000001);
68*4882a593Smuzhiyun out_be32(&sdram->cr08, 0x01000001);
69*4882a593Smuzhiyun out_be32(&sdram->cr09, 0x00000100);
70*4882a593Smuzhiyun out_be32(&sdram->cr10, 0x00010001);
71*4882a593Smuzhiyun out_be32(&sdram->cr11, 0x00000200);
72*4882a593Smuzhiyun out_be32(&sdram->cr12, 0x01000002);
73*4882a593Smuzhiyun out_be32(&sdram->cr13, 0x00000000);
74*4882a593Smuzhiyun out_be32(&sdram->cr14, 0x00000100);
75*4882a593Smuzhiyun out_be32(&sdram->cr15, 0x02000100);
76*4882a593Smuzhiyun out_be32(&sdram->cr16, 0x02000407);
77*4882a593Smuzhiyun out_be32(&sdram->cr17, 0x02030007);
78*4882a593Smuzhiyun out_be32(&sdram->cr18, 0x02000100);
79*4882a593Smuzhiyun out_be32(&sdram->cr19, 0x0A030203);
80*4882a593Smuzhiyun out_be32(&sdram->cr20, 0x00020708);
81*4882a593Smuzhiyun out_be32(&sdram->cr21, 0x00050008);
82*4882a593Smuzhiyun out_be32(&sdram->cr22, 0x04030002);
83*4882a593Smuzhiyun out_be32(&sdram->cr23, 0x00000004);
84*4882a593Smuzhiyun out_be32(&sdram->cr24, 0x020A0000);
85*4882a593Smuzhiyun out_be32(&sdram->cr25, 0x0C00000E);
86*4882a593Smuzhiyun out_be32(&sdram->cr26, 0x00002004);
87*4882a593Smuzhiyun out_be32(&sdram->cr28, 0x00100010);
88*4882a593Smuzhiyun out_be32(&sdram->cr29, 0x00100010);
89*4882a593Smuzhiyun out_be32(&sdram->cr31, 0x07990000);
90*4882a593Smuzhiyun out_be32(&sdram->cr40, 0x00000000);
91*4882a593Smuzhiyun out_be32(&sdram->cr41, 0x00C80064);
92*4882a593Smuzhiyun out_be32(&sdram->cr42, 0x44520002);
93*4882a593Smuzhiyun out_be32(&sdram->cr43, 0x00C80023);
94*4882a593Smuzhiyun out_be32(&sdram->cr45, 0x0000C350);
95*4882a593Smuzhiyun out_be32(&sdram->cr56, 0x04000000);
96*4882a593Smuzhiyun out_be32(&sdram->cr57, 0x03000304);
97*4882a593Smuzhiyun out_be32(&sdram->cr58, 0x40040000);
98*4882a593Smuzhiyun out_be32(&sdram->cr59, 0xC0004004);
99*4882a593Smuzhiyun out_be32(&sdram->cr60, 0x0642C000);
100*4882a593Smuzhiyun out_be32(&sdram->cr61, 0x00000642);
101*4882a593Smuzhiyun asm("tpf");
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun out_be32(&sdram->cr09, 0x01000100);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun udelay(100);
106*4882a593Smuzhiyun #endif
107*4882a593Smuzhiyun gd->ram_size = dramsize;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun return 0;
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun
testdram(void)112*4882a593Smuzhiyun int testdram(void)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116