1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright 2016 NXP Semiconductor. 3*4882a593Smuzhiyun * Author: Wang Dongsheng <dongsheng.wang@freescale.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include <config.h> 9*4882a593Smuzhiyun#include <linux/linkage.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include <asm/armv7.h> 12*4882a593Smuzhiyun#include <asm/psci.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun .pushsection ._secure.text, "ax" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun .arch_extension sec 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun .align 5 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun.globl psci_system_off 21*4882a593Smuzhiyunpsci_system_off: 22*4882a593Smuzhiyun @ Get QIXIS base address 23*4882a593Smuzhiyun movw r1, #(QIXIS_BASE & 0xffff) 24*4882a593Smuzhiyun movt r1, #(QIXIS_BASE >> 16) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun ldrb r2, [r1, #QIXIS_PWR_CTL] 27*4882a593Smuzhiyun orr r2, r2, #QIXIS_PWR_CTL_POWEROFF 28*4882a593Smuzhiyun strb r2, [r1, #QIXIS_PWR_CTL] 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun1: wfi 31*4882a593Smuzhiyun b 1b 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun .popsection 34