xref: /OK3568_Linux_fs/u-boot/board/freescale/ls1021aiot/dcu.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2016 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * FSL DCU Framebuffer driver
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <fsl_dcu_fb.h>
11*4882a593Smuzhiyun #include "div64.h"
12*4882a593Smuzhiyun #include "../common/dcu_sii9022a.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
15*4882a593Smuzhiyun 
dcu_set_pixel_clock(unsigned int pixclock)16*4882a593Smuzhiyun unsigned int dcu_set_pixel_clock(unsigned int pixclock)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun 	unsigned long long div;
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun 	div = (unsigned long long)(gd->bus_clk / 1000);
21*4882a593Smuzhiyun 	div *= (unsigned long long)pixclock;
22*4882a593Smuzhiyun 	do_div(div, 1000000000);
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	return div;
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun 
platform_dcu_init(unsigned int xres,unsigned int yres,const char * port,struct fb_videomode * dcu_fb_videomode)27*4882a593Smuzhiyun int platform_dcu_init(unsigned int xres, unsigned int yres,
28*4882a593Smuzhiyun 		const char *port,
29*4882a593Smuzhiyun 		struct fb_videomode *dcu_fb_videomode)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	const char *name;
32*4882a593Smuzhiyun 	unsigned int pixel_format;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	if (strncmp(port, "twr_lcd", 4) == 0) {
35*4882a593Smuzhiyun 		name = "TWR_LCD_RGB card";
36*4882a593Smuzhiyun 	} else {
37*4882a593Smuzhiyun 		name = "HDMI";
38*4882a593Smuzhiyun 		dcu_set_dvi_encoder(dcu_fb_videomode);
39*4882a593Smuzhiyun 	}
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	pixel_format = 32;
44*4882a593Smuzhiyun 	fsl_dcu_init(xres, yres, pixel_format);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	return 0;
47*4882a593Smuzhiyun }
48