xref: /OK3568_Linux_fs/u-boot/board/freescale/ls1012ardb/README (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunOverview
2*4882a593Smuzhiyun--------
3*4882a593SmuzhiyunQorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
4*4882a593Smuzhiyundevelopment platform, with a complete debugging environment.
5*4882a593SmuzhiyunThe LS1012ARDB board supports the QorIQ LS1012A processor and is
6*4882a593Smuzhiyunoptimized to support the high-bandwidth DDR3L memory and
7*4882a593Smuzhiyuna full complement of high-speed SerDes ports.
8*4882a593Smuzhiyun
9*4882a593SmuzhiyunLS1012A SoC Overview
10*4882a593Smuzhiyun--------------------
11*4882a593SmuzhiyunPlease refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
12*4882a593SmuzhiyunSoC overview.
13*4882a593Smuzhiyun
14*4882a593SmuzhiyunLS1012ARDB board Overview
15*4882a593Smuzhiyun-----------------------
16*4882a593Smuzhiyun - SERDES Connections, 4 lanes supporting:
17*4882a593Smuzhiyun      - PCI Express - 3.0
18*4882a593Smuzhiyun      - SGMII, SGMII 2.5
19*4882a593Smuzhiyun      - SATA 3.0
20*4882a593Smuzhiyun - DDR Controller
21*4882a593Smuzhiyun     - 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s
22*4882a593Smuzhiyun -QSPI: A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
23*4882a593Smuzhiyun signals to
24*4882a593Smuzhiyun    - QSPI NOR flash memory (2 virtual banks)
25*4882a593Smuzhiyun    - the QSPI emulator.s
26*4882a593Smuzhiyun - USB 3.0
27*4882a593Smuzhiyun    - one high-speed USB 2.0/3.0 port.
28*4882a593Smuzhiyun - Two enhanced secure digital host controllers:
29*4882a593Smuzhiyun    - SDHC1 controller can be connected to onboard SDHC connector
30*4882a593Smuzhiyun    - SDHC2 controller: Three dual 1:4 mux/demux devices,
31*4882a593Smuzhiyun    74CBTLV3253DS (U30, U31, U33) drive the SDHC2 signals to eMMC,
32*4882a593Smuzhiyun    SDIO WiFi, SPI, and Ardiuno shield
33*4882a593Smuzhiyun - 2 I2C controllers
34*4882a593Smuzhiyun - One SATA onboard connectors
35*4882a593Smuzhiyun - UART
36*4882a593Smuzhiyun   - The LS1012A processor consists of two UART controllers,
37*4882a593Smuzhiyun   out of which only UART1 is used on RDB.
38*4882a593Smuzhiyun - ARM JTAG support
39*4882a593Smuzhiyun
40*4882a593SmuzhiyunBooting Options
41*4882a593Smuzhiyun---------------
42*4882a593Smuzhiyuna) QSPI Flash Emu Boot
43*4882a593Smuzhiyunb) QSPI Flash 1
44*4882a593Smuzhiyunc) QSPI Flash 2
45*4882a593Smuzhiyun
46*4882a593SmuzhiyunQSPI flash map
47*4882a593Smuzhiyun--------------
48*4882a593SmuzhiyunImages		| Size	|QSPI Flash Address
49*4882a593Smuzhiyun------------------------------------------
50*4882a593SmuzhiyunRCW + PBI	| 1MB	| 0x4000_0000
51*4882a593SmuzhiyunU-boot 		| 1MB	| 0x4010_0000
52*4882a593SmuzhiyunU-boot Env 	| 1MB	| 0x4020_0000
53*4882a593SmuzhiyunPPA FIT image	| 2MB	| 0x4050_0000
54*4882a593SmuzhiyunLinux ITB	| ~53MB | 0x40A0_0000
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