1*4882a593SmuzhiyunOverview 2*4882a593Smuzhiyun-------- 3*4882a593SmuzhiyunQorIQ LS1012A Development System (LS1012AQDS) is a high-performance 4*4882a593Smuzhiyundevelopment platform, with a complete debugging environment. 5*4882a593SmuzhiyunThe LS1012AQDS board supports the QorIQ LS1012A processor and is 6*4882a593Smuzhiyunoptimized to support the high-bandwidth DDR3L memory and 7*4882a593Smuzhiyuna full complement of high-speed SerDes ports. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunLS1012A SoC Overview 10*4882a593Smuzhiyun-------------------- 11*4882a593SmuzhiyunPlease refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1012A 12*4882a593SmuzhiyunSoC overview. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunLS1012AQDS board Overview 15*4882a593Smuzhiyun----------------------- 16*4882a593Smuzhiyun - SERDES Connections, 4 lanes supporting: 17*4882a593Smuzhiyun - PCI Express - 3.0 18*4882a593Smuzhiyun - SGMII, SGMII 2.5 19*4882a593Smuzhiyun - SATA 3.0 20*4882a593Smuzhiyun - DDR Controller 21*4882a593Smuzhiyun - 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s 22*4882a593Smuzhiyun - QSPI Controller 23*4882a593Smuzhiyun - A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select 24*4882a593Smuzhiyun signals to QSPI NOR flash memory (2 virtual banks) and the QSPI 25*4882a593Smuzhiyun emulator 26*4882a593Smuzhiyun - USB 3.0 27*4882a593Smuzhiyun - One USB 3.0 controller with integrated PHY 28*4882a593Smuzhiyun - One high-speed USB 3.0 port 29*4882a593Smuzhiyun - USB 2.0 30*4882a593Smuzhiyun - One USB 2.0 controller with ULPI interface 31*4882a593Smuzhiyun - Two enhanced secure digital host controllers: 32*4882a593Smuzhiyun - SDHC1 controller can be connected to onboard SDHC connector 33*4882a593Smuzhiyun - SDHC2 controller: 1-/4-bit SD/MMC card supporting 1.8 V devices 34*4882a593Smuzhiyun - 2 I2C controllers 35*4882a593Smuzhiyun - One SATA onboard connectors 36*4882a593Smuzhiyun - UART 37*4882a593Smuzhiyun - 5 SAI 38*4882a593Smuzhiyun - One SAI port with audio codec SGTL5000: 39*4882a593Smuzhiyun • Provides MIC bias 40*4882a593Smuzhiyun • Provides headphone and line output 41*4882a593Smuzhiyun - One SAI port terminated at 2x6 header 42*4882a593Smuzhiyun - Three SAI Tx/Rx ports terminated at 2x3 headers 43*4882a593Smuzhiyun - ARM JTAG support 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunBooting Options 46*4882a593Smuzhiyun--------------- 47*4882a593Smuzhiyuna) QSPI Flash Emu Boot 48*4882a593Smuzhiyunb) QSPI Flash 1 49*4882a593Smuzhiyunc) QSPI Flash 2 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunQSPI flash map 52*4882a593Smuzhiyun-------------- 53*4882a593SmuzhiyunImages | Size |QSPI Flash Address 54*4882a593Smuzhiyun------------------------------------------ 55*4882a593SmuzhiyunRCW + PBI | 1MB | 0x4000_0000 56*4882a593SmuzhiyunU-boot | 1MB | 0x4010_0000 57*4882a593SmuzhiyunU-boot Env | 1MB | 0x4020_0000 58*4882a593SmuzhiyunPPA FIT image | 2MB | 0x4050_0000 59*4882a593SmuzhiyunLinux ITB | ~53MB | 0x40A0_0000 60