1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2004 Freescale Semiconductor. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __EEPROM_H_ 8*4882a593Smuzhiyun #define __EEPROM_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * EEPROM Board System Register interface. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * CPU Board Revision 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun #define MPC85XX_CPU_BOARD_REV(maj, min) ((((maj)&0xff) << 8) | ((min) & 0xff)) 20*4882a593Smuzhiyun #define MPC85XX_CPU_BOARD_MAJOR(rev) (((rev) >> 8) & 0xff) 21*4882a593Smuzhiyun #define MPC85XX_CPU_BOARD_MINOR(rev) ((rev) & 0xff) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define MPC85XX_CPU_BOARD_REV_UNKNOWN MPC85XX_CPU_BOARD_REV(0,0) 24*4882a593Smuzhiyun #define MPC85XX_CPU_BOARD_REV_1_0 MPC85XX_CPU_BOARD_REV(1,0) 25*4882a593Smuzhiyun #define MPC85XX_CPU_BOARD_REV_1_1 MPC85XX_CPU_BOARD_REV(1,1) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* 28*4882a593Smuzhiyun * Returns CPU board revision register as a 16-bit value with 29*4882a593Smuzhiyun * the Major in the high byte, and Minor in the low byte. 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun extern unsigned int get_cpu_board_revision(void); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #endif /* __CADMUS_H_ */ 35