1*4882a593Smuzhiyun /* Copyright 2013 Freescale Semiconductor, Inc.
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <common.h>
7*4882a593Smuzhiyun #include <console.h>
8*4882a593Smuzhiyun #include <environment.h>
9*4882a593Smuzhiyun #include <ns16550.h>
10*4882a593Smuzhiyun #include <malloc.h>
11*4882a593Smuzhiyun #include <mmc.h>
12*4882a593Smuzhiyun #include <nand.h>
13*4882a593Smuzhiyun #include <i2c.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun
get_effective_memsize(void)17*4882a593Smuzhiyun phys_size_t get_effective_memsize(void)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun return CONFIG_SYS_L2_SIZE;
20*4882a593Smuzhiyun }
21*4882a593Smuzhiyun
board_init_f(ulong bootflag)22*4882a593Smuzhiyun void board_init_f(ulong bootflag)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun u32 plat_ratio;
25*4882a593Smuzhiyun ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun console_init_f();
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* initialize selected port with appropriate baud rate */
30*4882a593Smuzhiyun plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
31*4882a593Smuzhiyun plat_ratio >>= 1;
32*4882a593Smuzhiyun gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
35*4882a593Smuzhiyun gd->bus_clk / 16 / CONFIG_BAUDRATE);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /* copy code to RAM and jump to it - this should not return */
38*4882a593Smuzhiyun /* NOTE - code has to be copied out of NAND buffer before
39*4882a593Smuzhiyun * other blocks can be read.
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
board_init_r(gd_t * gd,ulong dest_addr)44*4882a593Smuzhiyun void board_init_r(gd_t *gd, ulong dest_addr)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun /* Pointer is writable since we allocated a register for it */
47*4882a593Smuzhiyun gd = (gd_t *)CONFIG_SPL_GD_ADDR;
48*4882a593Smuzhiyun bd_t *bd;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun memset(gd, 0, sizeof(gd_t));
51*4882a593Smuzhiyun bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
52*4882a593Smuzhiyun memset(bd, 0, sizeof(bd_t));
53*4882a593Smuzhiyun gd->bd = bd;
54*4882a593Smuzhiyun bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
55*4882a593Smuzhiyun bd->bi_memsize = CONFIG_SYS_L2_SIZE;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun arch_cpu_init();
58*4882a593Smuzhiyun get_clocks();
59*4882a593Smuzhiyun mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
60*4882a593Smuzhiyun CONFIG_SPL_RELOC_MALLOC_SIZE);
61*4882a593Smuzhiyun gd->flags |= GD_FLG_FULL_MALLOC_INIT;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* relocate environment function pointers etc. */
64*4882a593Smuzhiyun nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
65*4882a593Smuzhiyun (uchar *)CONFIG_ENV_ADDR);
66*4882a593Smuzhiyun gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
67*4882a593Smuzhiyun gd->env_valid = ENV_VALID;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun i2c_init_all();
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun dram_init();
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #ifdef CONFIG_SPL_NAND_BOOT
74*4882a593Smuzhiyun puts("TPL\n");
75*4882a593Smuzhiyun #else
76*4882a593Smuzhiyun puts("SPL\n");
77*4882a593Smuzhiyun #endif
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun nand_boot();
80*4882a593Smuzhiyun }
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