1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2011-2012 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <asm/processor.h>
9*4882a593Smuzhiyun #include <asm/mmu.h>
10*4882a593Smuzhiyun #include <asm/cache.h>
11*4882a593Smuzhiyun #include <asm/immap_85xx.h>
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun #include <miiphy.h>
14*4882a593Smuzhiyun #include <linux/libfdt.h>
15*4882a593Smuzhiyun #include <fdt_support.h>
16*4882a593Smuzhiyun #include <fsl_mdio.h>
17*4882a593Smuzhiyun #include <tsec.h>
18*4882a593Smuzhiyun #include <jffs2/load_kernel.h>
19*4882a593Smuzhiyun #include <mtd_node.h>
20*4882a593Smuzhiyun #include <flash.h>
21*4882a593Smuzhiyun #include <netdev.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
25*4882a593Smuzhiyun
board_early_init_f(void)26*4882a593Smuzhiyun int board_early_init_f(void)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42);
31*4882a593Smuzhiyun setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43);
34*4882a593Smuzhiyun setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK |
35*4882a593Smuzhiyun MPC85xx_PMUXCR2_UART_CTS_B1_SIM_PD);
36*4882a593Smuzhiyun setbits_be32(&gur->halt_req_mask, HALTED_TO_HALT_REQ_MASK_0);
37*4882a593Smuzhiyun clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_IFC_AD_GPIO_MASK |
38*4882a593Smuzhiyun MPC85xx_PMUXCR_IFC_AD17_GPO_MASK,
39*4882a593Smuzhiyun MPC85xx_PMUXCR_IFC_AD_GPIO |
40*4882a593Smuzhiyun MPC85xx_PMUXCR_IFC_AD17_GPO | MPC85xx_PMUXCR_SDHC_USIM);
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun return 0;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
checkboard(void)45*4882a593Smuzhiyun int checkboard(void)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun struct cpu_type *cpu;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun cpu = gd->arch.cpu;
50*4882a593Smuzhiyun printf("Board: %sRDB\n", cpu->name);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #if defined(CONFIG_OF_BOARD_SETUP)
56*4882a593Smuzhiyun #ifdef CONFIG_FDT_FIXUP_PARTITIONS
57*4882a593Smuzhiyun struct node_info nodes[] = {
58*4882a593Smuzhiyun { "fsl,ifc-nand", MTD_DEV_TYPE_NAND, },
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun #endif
ft_board_setup(void * blob,bd_t * bd)61*4882a593Smuzhiyun int ft_board_setup(void *blob, bd_t *bd)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun phys_addr_t base;
64*4882a593Smuzhiyun phys_size_t size;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun ft_cpu_setup(blob, bd);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun base = env_get_bootm_low();
69*4882a593Smuzhiyun size = env_get_bootm_size();
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun fdt_fixup_memory(blob, (u64)base, (u64)size);
72*4882a593Smuzhiyun #ifdef CONFIG_FDT_FIXUP_PARTITIONS
73*4882a593Smuzhiyun fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
74*4882a593Smuzhiyun #endif
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun fsl_fdt_fixup_dr_usb(blob, bd);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun #endif
81