1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Pinmux configuration for Compulab CM-T54 board
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #ifndef _CM_T54_MUX_DATA_H
12*4882a593Smuzhiyun #define _CM_T54_MUX_DATA_H
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <asm/arch/mux_omap5.h>
15*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun const struct pad_conf_entry core_padconf_array_essential[] = {
18*4882a593Smuzhiyun /* MMC1 - SD CARD */
19*4882a593Smuzhiyun {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */
20*4882a593Smuzhiyun {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */
21*4882a593Smuzhiyun {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0 */
22*4882a593Smuzhiyun {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1 */
23*4882a593Smuzhiyun {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2 */
24*4882a593Smuzhiyun {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3 */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* SD CARD CD and WP GPIOs*/
27*4882a593Smuzhiyun {TIMER5_PWM_EVT, (PTU | IEN | M6)}, /* GPIO8_228 */
28*4882a593Smuzhiyun {TIMER6_PWM_EVT, (PTU | IEN | M6)}, /* GPIO8_229 */
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* MMC2 - eMMC */
31*4882a593Smuzhiyun {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */
32*4882a593Smuzhiyun {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */
33*4882a593Smuzhiyun {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */
34*4882a593Smuzhiyun {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */
35*4882a593Smuzhiyun {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */
36*4882a593Smuzhiyun {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */
37*4882a593Smuzhiyun {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */
38*4882a593Smuzhiyun {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */
39*4882a593Smuzhiyun {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */
40*4882a593Smuzhiyun {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* UART4 */
43*4882a593Smuzhiyun {I2C5_SCL, (PTU | IEN | M2)}, /* UART4_RX */
44*4882a593Smuzhiyun {I2C5_SDA, (M2)}, /* UART4_TX */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* Led */
47*4882a593Smuzhiyun {HSI2_CAFLAG, (PTU | M6)}, /* GPIO3_80 */
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* I2C1 */
50*4882a593Smuzhiyun {I2C1_PMIC_SCL, (PTU | IEN | M0)}, /* I2C1_PMIC_SCL */
51*4882a593Smuzhiyun {I2C1_PMIC_SDA, (PTU | IEN | M0)}, /* I2C1_PMIC_SDA */
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* USBB2, USBB3 */
54*4882a593Smuzhiyun {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */
55*4882a593Smuzhiyun {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */
56*4882a593Smuzhiyun {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE */
57*4882a593Smuzhiyun {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* USB Hub and USB Eth reset GPIOs */
60*4882a593Smuzhiyun {HSI2_CAREADY, (PTD | M6)}, /* GPIO3_76 */
61*4882a593Smuzhiyun {HSI2_ACDATA, (PTD | M6)}, /* GPIO3_83 */
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* I2C4 */
64*4882a593Smuzhiyun {I2C4_SCL, (PTU | IEN | M0)}, /* I2C4_SCL */
65*4882a593Smuzhiyun {I2C4_SDA, (PTU | IEN | M0)}, /* I2C4_SDA */
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun const struct pad_conf_entry wkup_padconf_array_essential[] = {
69*4882a593Smuzhiyun {SR_PMIC_SCL, (PTU | IEN | M0)}, /* SR_PMIC_SCL */
70*4882a593Smuzhiyun {SR_PMIC_SDA, (PTU | IEN | M0)}, /* SR_PMIC_SDA */
71*4882a593Smuzhiyun {SYS_32K, (IEN | M0)}, /* SYS_32K */
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* USB Hub clock */
74*4882a593Smuzhiyun {FREF_CLK1_OUT, (PTD | IEN | M0)}, /* FREF_CLK1_OUT */
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun * Routine: set_muxconf_regs
79*4882a593Smuzhiyun * Description: setup board pinmux configuration.
80*4882a593Smuzhiyun */
set_muxconf_regs(void)81*4882a593Smuzhiyun void set_muxconf_regs(void)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun do_set_mux((*ctrl)->control_padconf_core_base,
84*4882a593Smuzhiyun core_padconf_array_essential,
85*4882a593Smuzhiyun sizeof(core_padconf_array_essential) /
86*4882a593Smuzhiyun sizeof(struct pad_conf_entry));
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun do_set_mux((*ctrl)->control_padconf_wkup_base,
89*4882a593Smuzhiyun wkup_padconf_array_essential,
90*4882a593Smuzhiyun sizeof(wkup_padconf_array_essential) /
91*4882a593Smuzhiyun sizeof(struct pad_conf_entry));
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun #endif /* _CM_T54_MUX_DATA_H */
95