1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Board functions for Compulab CM-T54 board
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <fdt_support.h>
13*4882a593Smuzhiyun #include <usb.h>
14*4882a593Smuzhiyun #include <mmc.h>
15*4882a593Smuzhiyun #include <palmas.h>
16*4882a593Smuzhiyun #include <spl.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <asm/gpio.h>
19*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
20*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h>
21*4882a593Smuzhiyun #include <asm/arch/clock.h>
22*4882a593Smuzhiyun #include <asm/arch/ehci.h>
23*4882a593Smuzhiyun #include <asm/ehci-omap.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include "../common/eeprom.h"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
28*4882a593Smuzhiyun #define DIE_ID_REG_OFFSET 0x200
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #if !defined(CONFIG_SPL_BUILD)
set_muxconf_regs(void)33*4882a593Smuzhiyun inline void set_muxconf_regs(void){};
34*4882a593Smuzhiyun #endif
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun const struct omap_sysinfo sysinfo = {
37*4882a593Smuzhiyun "Board: CM-T54\n"
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun * Routine: board_init
42*4882a593Smuzhiyun * Description: hardware init.
43*4882a593Smuzhiyun */
board_init(void)44*4882a593Smuzhiyun int board_init(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun return 0;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /*
52*4882a593Smuzhiyun * Routine: cm_t54_palmas_regulator_set
53*4882a593Smuzhiyun * Description: select voltage and turn on/off Palmas PMIC regulator.
54*4882a593Smuzhiyun */
cm_t54_palmas_regulator_set(u8 vreg,u8 vval,u8 creg,u8 cval)55*4882a593Smuzhiyun static int cm_t54_palmas_regulator_set(u8 vreg, u8 vval, u8 creg, u8 cval)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun int err;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* Setup voltage */
60*4882a593Smuzhiyun err = palmas_i2c_write_u8(TWL603X_CHIP_P1, vreg, vval);
61*4882a593Smuzhiyun if (err) {
62*4882a593Smuzhiyun printf("cm_t54: could not set regulator 0x%02x voltage : %d\n",
63*4882a593Smuzhiyun vreg, err);
64*4882a593Smuzhiyun return err;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* Turn on/off regulator */
68*4882a593Smuzhiyun err = palmas_i2c_write_u8(TWL603X_CHIP_P1, creg, cval);
69*4882a593Smuzhiyun if (err) {
70*4882a593Smuzhiyun printf("cm_t54: could not turn on/off regulator 0x%02x : %d\n",
71*4882a593Smuzhiyun creg, err);
72*4882a593Smuzhiyun return err;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /*
79*4882a593Smuzhiyun * Routine: mmc_get_env_part
80*4882a593Smuzhiyun * Description: setup environment storage device partition.
81*4882a593Smuzhiyun */
82*4882a593Smuzhiyun #ifdef CONFIG_SYS_MMC_ENV_PART
mmc_get_env_part(struct mmc * mmc)83*4882a593Smuzhiyun uint mmc_get_env_part(struct mmc *mmc)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun u32 bootmode = gd->arch.omap_boot_mode;
86*4882a593Smuzhiyun uint bootpart = CONFIG_SYS_MMC_ENV_PART;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /*
89*4882a593Smuzhiyun * If booted from eMMC boot partition then force eMMC
90*4882a593Smuzhiyun * FIRST boot partition to be env storage
91*4882a593Smuzhiyun */
92*4882a593Smuzhiyun if (bootmode == BOOT_DEVICE_MMC2)
93*4882a593Smuzhiyun bootpart = 1;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return bootpart;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun #endif
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun #if defined(CONFIG_MMC)
100*4882a593Smuzhiyun #define SB_T54_CD_GPIO 228
101*4882a593Smuzhiyun #define SB_T54_WP_GPIO 229
102*4882a593Smuzhiyun
board_mmc_init(bd_t * bis)103*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun int ret0, ret1;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun ret0 = omap_mmc_init(0, 0, 0, SB_T54_CD_GPIO, SB_T54_WP_GPIO);
108*4882a593Smuzhiyun if (ret0)
109*4882a593Smuzhiyun printf("cm_t54: failed to initialize mmc0\n");
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun ret1 = omap_mmc_init(1, 0, 0, -1, -1);
112*4882a593Smuzhiyun if (ret1)
113*4882a593Smuzhiyun printf("cm_t54: failed to initialize mmc1\n");
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun if (ret0 && ret1)
116*4882a593Smuzhiyun return -1;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun return 0;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun #endif
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun #ifdef CONFIG_USB_HOST_ETHER
123*4882a593Smuzhiyun
ft_board_setup(void * blob,bd_t * bd)124*4882a593Smuzhiyun int ft_board_setup(void *blob, bd_t *bd)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun uint8_t enetaddr[6];
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /* MAC addr */
129*4882a593Smuzhiyun if (eth_env_get_enetaddr("usbethaddr", enetaddr)) {
130*4882a593Smuzhiyun fdt_find_and_setprop(blob, "/smsc95xx@0", "mac-address",
131*4882a593Smuzhiyun enetaddr, 6, 1);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return 0;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
generate_mac_addr(uint8_t * enetaddr)137*4882a593Smuzhiyun static void generate_mac_addr(uint8_t *enetaddr)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun int reg;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /*
144*4882a593Smuzhiyun * create a fake MAC address from the processor ID code.
145*4882a593Smuzhiyun * first byte is 0x02 to signify locally administered.
146*4882a593Smuzhiyun */
147*4882a593Smuzhiyun enetaddr[0] = 0x02;
148*4882a593Smuzhiyun enetaddr[1] = readl(reg + 0x10) & 0xff;
149*4882a593Smuzhiyun enetaddr[2] = readl(reg + 0xC) & 0xff;
150*4882a593Smuzhiyun enetaddr[3] = readl(reg + 0x8) & 0xff;
151*4882a593Smuzhiyun enetaddr[4] = readl(reg) & 0xff;
152*4882a593Smuzhiyun enetaddr[5] = (readl(reg) >> 8) & 0xff;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /*
156*4882a593Smuzhiyun * Routine: handle_mac_address
157*4882a593Smuzhiyun * Description: prepare MAC address for on-board Ethernet.
158*4882a593Smuzhiyun */
handle_mac_address(void)159*4882a593Smuzhiyun static int handle_mac_address(void)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun uint8_t enetaddr[6];
162*4882a593Smuzhiyun int ret;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun ret = eth_env_get_enetaddr("usbethaddr", enetaddr);
165*4882a593Smuzhiyun if (ret)
166*4882a593Smuzhiyun return 0;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun ret = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS);
169*4882a593Smuzhiyun if (ret || !is_valid_ethaddr(enetaddr))
170*4882a593Smuzhiyun generate_mac_addr(enetaddr);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (!is_valid_ethaddr(enetaddr))
173*4882a593Smuzhiyun return -1;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun return eth_env_set_enetaddr("usbethaddr", enetaddr);
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
board_eth_init(bd_t * bis)178*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun return handle_mac_address();
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun #endif
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun #ifdef CONFIG_USB_EHCI_HCD
185*4882a593Smuzhiyun static struct omap_usbhs_board_data usbhs_bdata = {
186*4882a593Smuzhiyun .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
187*4882a593Smuzhiyun .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
188*4882a593Smuzhiyun .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun
setup_host_clocks(bool enable)191*4882a593Smuzhiyun static void setup_host_clocks(bool enable)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun int usbhost_clk = OPTFCLKEN_HSIC60M_P3_CLK |
194*4882a593Smuzhiyun OPTFCLKEN_HSIC480M_P3_CLK |
195*4882a593Smuzhiyun OPTFCLKEN_HSIC60M_P2_CLK |
196*4882a593Smuzhiyun OPTFCLKEN_HSIC480M_P2_CLK |
197*4882a593Smuzhiyun OPTFCLKEN_UTMI_P3_CLK |
198*4882a593Smuzhiyun OPTFCLKEN_UTMI_P2_CLK;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun int usbtll_clk = OPTFCLKEN_USB_CH1_CLK_ENABLE |
201*4882a593Smuzhiyun OPTFCLKEN_USB_CH2_CLK_ENABLE;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun int usbhub_clk = CKOBUFFER_CLK_ENABLE_MASK;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun if (enable) {
206*4882a593Smuzhiyun /* Enable port 2 and 3 clocks*/
207*4882a593Smuzhiyun setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk);
208*4882a593Smuzhiyun /* Enable port 2 and 3 usb host ports tll clocks*/
209*4882a593Smuzhiyun setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk);
210*4882a593Smuzhiyun /* Request FREF_XTAL_CLK clock for HSIC USB Hub */
211*4882a593Smuzhiyun setbits_le32((*ctrl)->control_ckobuffer, usbhub_clk);
212*4882a593Smuzhiyun } else {
213*4882a593Smuzhiyun clrbits_le32((*ctrl)->control_ckobuffer, usbhub_clk);
214*4882a593Smuzhiyun clrbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk);
215*4882a593Smuzhiyun clrbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk);
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
ehci_hcd_init(int index,enum usb_init_type init,struct ehci_hccr ** hccr,struct ehci_hcor ** hcor)219*4882a593Smuzhiyun int ehci_hcd_init(int index, enum usb_init_type init,
220*4882a593Smuzhiyun struct ehci_hccr **hccr, struct ehci_hcor **hcor)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun int ret;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /* VCC_3V3_ETH */
225*4882a593Smuzhiyun cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_3V3, SMPS9_CTRL,
226*4882a593Smuzhiyun SMPS_MODE_SLP_AUTO | SMPS_MODE_ACT_AUTO);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun setup_host_clocks(true);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
231*4882a593Smuzhiyun if (ret < 0)
232*4882a593Smuzhiyun printf("cm_t54: Failed to initialize ehci : %d\n", ret);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun return ret;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
ehci_hcd_stop(void)237*4882a593Smuzhiyun int ehci_hcd_stop(void)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun int ret = omap_ehci_hcd_stop();
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun setup_host_clocks(false);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_OFF,
244*4882a593Smuzhiyun SMPS9_CTRL, SMPS_MODE_SLP_AUTO);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun return ret;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
usb_hub_reset_devices(struct usb_hub_device * hub,int port)249*4882a593Smuzhiyun void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun /* The LAN9730 needs to be reset after the port power has been set. */
252*4882a593Smuzhiyun if (port == 3) {
253*4882a593Smuzhiyun gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
254*4882a593Smuzhiyun udelay(10);
255*4882a593Smuzhiyun gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun #endif
259*4882a593Smuzhiyun
260