1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * See file CREDITS for list of people who contributed to this 5*4882a593Smuzhiyun * project. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <common.h> 11*4882a593Smuzhiyun #include <asm/io.h> 12*4882a593Smuzhiyun #include <asm/arch/tegra.h> 13*4882a593Smuzhiyun #include <asm/arch/pinmux.h> 14*4882a593Smuzhiyun #include <asm/gpio.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #ifdef CONFIG_MMC_SDHCI_TEGRA 17*4882a593Smuzhiyun /* 18*4882a593Smuzhiyun * Routine: pin_mux_mmc 19*4882a593Smuzhiyun * Description: setup the pin muxes/tristate values for the SDMMC(s) 20*4882a593Smuzhiyun */ pin_mux_mmc(void)21*4882a593Smuzhiyunvoid pin_mux_mmc(void) 22*4882a593Smuzhiyun { 23*4882a593Smuzhiyun /* SDMMC4: config 3, x8 on 2nd set of pins */ 24*4882a593Smuzhiyun pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4); 25*4882a593Smuzhiyun pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4); 26*4882a593Smuzhiyun pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4); 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_ATB); 29*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_GMA); 30*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_GME); 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */ 33*4882a593Smuzhiyun pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_SDIO1); 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* For power GPIO PV1 */ 38*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_UAC); 39*4882a593Smuzhiyun /* For CD GPIO PV5 */ 40*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_GPV); 41*4882a593Smuzhiyun } 42*4882a593Smuzhiyun #endif 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #ifdef CONFIG_DM_VIDEO 45*4882a593Smuzhiyun /* this is a weak define that we are overriding */ pin_mux_display(void)46*4882a593Smuzhiyunvoid pin_mux_display(void) 47*4882a593Smuzhiyun { 48*4882a593Smuzhiyun debug("init display pinmux\n"); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* EN_VDD_PANEL GPIO A4 */ 51*4882a593Smuzhiyun pinmux_tristate_disable(PMUX_PINGRP_DAP2); 52*4882a593Smuzhiyun } 53*4882a593Smuzhiyun #endif 54