xref: /OK3568_Linux_fs/u-boot/board/cobra5272/bdm/cobra5272_uboot.gdb (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun#
2*4882a593Smuzhiyun# GDB Init script for the Coldfire 5272 processor.
3*4882a593Smuzhiyun#
4*4882a593Smuzhiyun# The main purpose of this script is to configure the
5*4882a593Smuzhiyun# DRAM controller so code can be loaded.
6*4882a593Smuzhiyun#
7*4882a593Smuzhiyun# This file was changed to suite the senTec COBRA5272 board.
8*4882a593Smuzhiyun#
9*4882a593Smuzhiyun
10*4882a593Smuzhiyundefine addresses
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunset $mbar  = 0x10000001
13*4882a593Smuzhiyunset $scr   = $mbar - 1 + 0x004
14*4882a593Smuzhiyunset $spr   = $mbar - 1 + 0x006
15*4882a593Smuzhiyunset $pmr   = $mbar - 1 + 0x008
16*4882a593Smuzhiyunset $apmr  = $mbar - 1 + 0x00e
17*4882a593Smuzhiyunset $dir   = $mbar - 1 + 0x010
18*4882a593Smuzhiyunset $icr1  = $mbar - 1 + 0x020
19*4882a593Smuzhiyunset $icr2  = $mbar - 1 + 0x024
20*4882a593Smuzhiyunset $icr3  = $mbar - 1 + 0x028
21*4882a593Smuzhiyunset $icr4  = $mbar - 1 + 0x02c
22*4882a593Smuzhiyunset $isr   = $mbar - 1 + 0x030
23*4882a593Smuzhiyunset $pitr  = $mbar - 1 + 0x034
24*4882a593Smuzhiyunset $piwr  = $mbar - 1 + 0x038
25*4882a593Smuzhiyunset $pivr  = $mbar - 1 + 0x03f
26*4882a593Smuzhiyunset $csbr0 = $mbar - 1 + 0x040
27*4882a593Smuzhiyunset $csor0 = $mbar - 1 + 0x044
28*4882a593Smuzhiyunset $csbr1 = $mbar - 1 + 0x048
29*4882a593Smuzhiyunset $csor1 = $mbar - 1 + 0x04c
30*4882a593Smuzhiyunset $csbr2 = $mbar - 1 + 0x050
31*4882a593Smuzhiyunset $csor2 = $mbar - 1 + 0x054
32*4882a593Smuzhiyunset $csbr3 = $mbar - 1 + 0x058
33*4882a593Smuzhiyunset $csor3 = $mbar - 1 + 0x05c
34*4882a593Smuzhiyunset $csbr4 = $mbar - 1 + 0x060
35*4882a593Smuzhiyunset $csor4 = $mbar - 1 + 0x064
36*4882a593Smuzhiyunset $csbr5 = $mbar - 1 + 0x068
37*4882a593Smuzhiyunset $csor5 = $mbar - 1 + 0x06c
38*4882a593Smuzhiyunset $csbr6 = $mbar - 1 + 0x070
39*4882a593Smuzhiyunset $csor6 = $mbar - 1 + 0x074
40*4882a593Smuzhiyunset $csbr7 = $mbar - 1 + 0x078
41*4882a593Smuzhiyunset $csor7 = $mbar - 1 + 0x07c
42*4882a593Smuzhiyunset $pacnt = $mbar - 1 + 0x080
43*4882a593Smuzhiyunset $paddr = $mbar - 1 + 0x084
44*4882a593Smuzhiyunset $padat = $mbar - 1 + 0x086
45*4882a593Smuzhiyunset $pbcnt = $mbar - 1 + 0x088
46*4882a593Smuzhiyunset $pbddr = $mbar - 1 + 0x08c
47*4882a593Smuzhiyunset $pbdat = $mbar - 1 + 0x08e
48*4882a593Smuzhiyunset $pcddr = $mbar - 1 + 0x094
49*4882a593Smuzhiyunset $pcdat = $mbar - 1 + 0x096
50*4882a593Smuzhiyunset $pdcnt = $mbar - 1 + 0x098
51*4882a593Smuzhiyunset $sdcr  = $mbar - 1 + 0x180
52*4882a593Smuzhiyunset $sdtr  = $mbar - 1 + 0x184
53*4882a593Smuzhiyunset $wrrr  = $mbar - 1 + 0x280
54*4882a593Smuzhiyunset $wirr  = $mbar - 1 + 0x283
55*4882a593Smuzhiyunset $wcr   = $mbar - 1 + 0x288
56*4882a593Smuzhiyunset $wer   = $mbar - 1 + 0x28c
57*4882a593Smuzhiyun
58*4882a593Smuzhiyunend
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun#
62*4882a593Smuzhiyun# Setup system configuration
63*4882a593Smuzhiyun#
64*4882a593Smuzhiyundefine setup-sys
65*4882a593Smuzhiyunset *((unsigned short *) $scr) = 0x0003
66*4882a593Smuzhiyunset *((unsigned short *) $spr) = 0xffff
67*4882a593Smuzhiyunset *((unsigned char *) $pivr) = 0x4f
68*4882a593Smuzhiyunend
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun#
72*4882a593Smuzhiyun# Setup Chip Selects (as per Motorola M5272C3 board)
73*4882a593Smuzhiyun#
74*4882a593Smuzhiyundefine setup-cs
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun# CS0 -- FLASH
77*4882a593Smuzhiyunset *((unsigned long *) $csbr0) = 0xffe00201
78*4882a593Smuzhiyunset *((unsigned long *) $csor0) = 0xffe00014
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun# CS1 -- external bus test
81*4882a593Smuzhiyunset *((unsigned long *) $csbr1) = 0x0
82*4882a593Smuzhiyunset *((unsigned long *) $csor1) = 0x0
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun# CS2 -- Optional FSRAM
85*4882a593Smuzhiyunset *((unsigned long *) $csbr2) = 0x30000001
86*4882a593Smuzhiyunset *((unsigned long *) $csor2) = 0xfff80000
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun# CS3 -- not used
89*4882a593Smuzhiyunset *((unsigned long *) $csbr3) = 0x0
90*4882a593Smuzhiyunset *((unsigned long *) $csor3) = 0x0
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun# CS4 --  not used
93*4882a593Smuzhiyunset *((unsigned long *) $csbr4) = 0x0
94*4882a593Smuzhiyunset *((unsigned long *) $csor4) = 0x0
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun# CS5 -- PLI socket0
97*4882a593Smuzhiyunset *((unsigned long *) $csbr5) = 0x0
98*4882a593Smuzhiyunset *((unsigned long *) $csor5) = 0x0
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun# CS6 -- PLI socket1
101*4882a593Smuzhiyunset *((unsigned long *) $csbr6) = 0x0
102*4882a593Smuzhiyunset *((unsigned long *) $csor6) = 0x0
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun# CS7 -- SDRAM
105*4882a593Smuzhiyunset *((unsigned long *) $csbr7) = 0x00000701
106*4882a593Smuzhiyunset *((unsigned long *) $csor7) = 0xff00007c
107*4882a593Smuzhiyun
108*4882a593Smuzhiyunend
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun#
112*4882a593Smuzhiyun# Setup the DRAM controller.
113*4882a593Smuzhiyun#
114*4882a593Smuzhiyun
115*4882a593Smuzhiyundefine setup-dram
116*4882a593Smuzhiyunset *((unsigned long *) $sdtr) = 0x0000f539
117*4882a593Smuzhiyunset *((unsigned long *) $sdcr) = 0x00004211
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun# Dummy write to start SDRAM
120*4882a593Smuzhiyunset *((unsigned long *) 0) = 0
121*4882a593Smuzhiyunend
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun#
125*4882a593Smuzhiyun# Setup for GPIO pins
126*4882a593Smuzhiyun#
127*4882a593Smuzhiyundefine setup-ppio
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun# PORT A -- the LED's
130*4882a593Smuzhiyunset *((unsigned long *) $pacnt) = 0x00000000
131*4882a593Smuzhiyun# lower 8 bits for output:
132*4882a593Smuzhiyunset *((unsigned short *) $paddr) = 0xff
133*4882a593Smuzhiyun# LED's off:
134*4882a593Smuzhiyunset *((unsigned short *) $padat) = 0xff
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun# PORT B
137*4882a593Smuzhiyunset *((unsigned long *) $pbcnt) = 0x55554155
138*4882a593Smuzhiyunset *((unsigned short *) $pbddr) = 0x0000
139*4882a593Smuzhiyunset *((unsigned short *) $pbdat) = 0x17ea
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun# PORT C
142*4882a593Smuzhiyun#set *((unsigned short *) $pcddr) = 0x0000
143*4882a593Smuzhiyun#set *((unsigned short *) $pcdat) = 0x1898
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun# PORT D
146*4882a593Smuzhiyunset *((unsigned long *) $pdcnt) = 0x00000000
147*4882a593Smuzhiyun
148*4882a593Smuzhiyunend
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun#
152*4882a593Smuzhiyun#	Added for uClinux-coldfire target...
153*4882a593Smuzhiyun#
154*4882a593Smuzhiyuntarget bdm /dev/bdm
155*4882a593Smuzhiyun
156*4882a593Smuzhiyunaddresses
157*4882a593Smuzhiyunsetup-sys
158*4882a593Smuzhiyunsetup-cs
159*4882a593Smuzhiyunsetup-dram
160*4882a593Smuzhiyunsetup-ppio
161*4882a593Smuzhiyunset print pretty
162*4882a593Smuzhiyunset print asm-demangle
163*4882a593Smuzhiyundisplay/i $pc
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun#
167*4882a593Smuzhiyunload u-boot
168*4882a593Smuzhiyunset $pc=0x20000
169*4882a593Smuzhiyunc
170