1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2012 3*4882a593Smuzhiyun * David Purdy <david.c.purdy@gmail.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Based on Kirkwood support: 6*4882a593Smuzhiyun * (C) Copyright 2009 7*4882a593Smuzhiyun * Marvell Semiconductor <www.marvell.com> 8*4882a593Smuzhiyun * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifndef __POGO_E02_H 14*4882a593Smuzhiyun #define __POGO_E02_H 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* GPIO configuration */ 17*4882a593Smuzhiyun #define POGO_E02_OE_LOW (~(0)) 18*4882a593Smuzhiyun #define POGO_E02_OE_HIGH (~(0)) 19*4882a593Smuzhiyun #define POGO_E02_OE_VAL_LOW (1 << 29) 20*4882a593Smuzhiyun #define POGO_E02_OE_VAL_HIGH 0 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* PHY related */ 23*4882a593Smuzhiyun #define MV88E1116_LED_FCTRL_REG 10 24*4882a593Smuzhiyun #define MV88E1116_CPRSP_CR3_REG 21 25*4882a593Smuzhiyun #define MV88E1116_MAC_CTRL_REG 21 26*4882a593Smuzhiyun #define MV88E1116_PGADR_REG 22 27*4882a593Smuzhiyun #define MV88E1116_RGMII_TXTM_CTRL (1 << 4) 28*4882a593Smuzhiyun #define MV88E1116_RGMII_RXTM_CTRL (1 << 5) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #endif /* __POGO_E02_H */ 31