1*4882a593Smuzhiyun Tensilica 'xtfpga' Evaluation Boards 2*4882a593Smuzhiyun ==================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunTensilica's 'xtfpga' evaluation boards are actually a set of different 5*4882a593Smuzhiyunboards that share configurations. The following is a list of supported 6*4882a593Smuzhiyunhardware by this board type: 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun- XT-AV60 / LX60 9*4882a593Smuzhiyun- XT-AV110 / LX110 10*4882a593Smuzhiyun- XT-AV200 / LX200 11*4882a593Smuzhiyun- ML605 12*4882a593Smuzhiyun- KC705 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunAll boards provide the following common configurations: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- An Xtensa or Diamond processor core. 17*4882a593Smuzhiyun- An on-chip-debug (OCD) JTAG interface. 18*4882a593Smuzhiyun- A 16550 compatible UART and serial port. 19*4882a593Smuzhiyun- An OpenCores Wishbone 10/100-base-T ethernet interface. 20*4882a593Smuzhiyun- A 32 char two line LCD display. (except for the LX200) 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunLX60/LX110/LX200: 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun- Virtex-4 (XC4VLX60 / XCV4LX200) / Virtext-5 (XC5VLX110) 25*4882a593Smuzhiyun- 128MB / 64MB (LX60) memory 26*4882a593Smuzhiyun- 16MB / 4MB (LX60) Linear Flash 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunML605 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun- Virtex-6 (XC6VLX240T) 31*4882a593Smuzhiyun- 512MB DDR3 memory 32*4882a593Smuzhiyun- 16MB Linear BPI Flash 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunKC705 (Xilinx) 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun- Kintex-7 XC7K325T FPGA 37*4882a593Smuzhiyun- 1GB DDR3 memory 38*4882a593Smuzhiyun- 128MB Linear BPI Flash 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunSetting up the Board 42*4882a593Smuzhiyun-------------------- 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunThe serial port defaults to 115200 baud, no parity and 1 stop bit. 45*4882a593SmuzhiyunA terminal emulator must be set accordingly to see the U-Boot prompt. 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun 48*4882a593SmuzhiyunBoard Configurations LX60/LX110/LX200/ML605/KC705 49*4882a593Smuzhiyun------------------------------------------------- 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunThe LX60/LX110/LX200/ML605 contain an 8-way DIP switch that controls 52*4882a593Smuzhiyunthe boot mapping and selects from a range of default ethernet MAC 53*4882a593Smuzhiyunaddresses. 54*4882a593Smuzhiyun 55*4882a593SmuzhiyunBoot Mapping (DIP switch 8): 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun DIP switch 8 maps the system ROM address space (in which the 58*4882a593Smuzhiyun reset vector resides) to either SRAM (off, 0, down) or Flash 59*4882a593Smuzhiyun (on, 1, up). This mapping is implemented in the FPGA bitstream 60*4882a593Smuzhiyun and cannot be disabled by software, therefore DIP switch 8 is no 61*4882a593Smuzhiyun available for application use. Note DIP switch 7 is reserved by 62*4882a593Smuzhiyun Tensilica for future possible hardware use. 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun Mapping to SRAM allows U-Boot to be debugged with an OCD/JTAG 65*4882a593Smuzhiyun tool such as the Xtensa OCD Daemon connected via a suppored probe. 66*4882a593Smuzhiyun See the tools documentation for supported probes and how to 67*4882a593Smuzhiyun connect them. Be aware that the board has only 128 KB of SRAM, 68*4882a593Smuzhiyun therefore U-Boot must fit within this space to debug an image 69*4882a593Smuzhiyun intended for the Flash. This issues is discussed in a separate 70*4882a593Smuzhiyun section toward the end. 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun Mapping to flash allows U-Boot to start on reset, provided it 73*4882a593Smuzhiyun has been programmed into the first two 64 KB sectors of the Flash. 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun The Flash is always mapped at a device (memory mapped I/O) address 76*4882a593Smuzhiyun (the address is board specific and is expressed as CFG_FLASH_BASE). 77*4882a593Smuzhiyun The device address is used by U-Boot to program the flash, and may 78*4882a593Smuzhiyun be used to specify an application to run or U-Boot image to boot. 79*4882a593Smuzhiyun 80*4882a593SmuzhiyunDefault MAC Address (DIP switches 1-6): 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun When the board is first powered on, or after the environment has 83*4882a593Smuzhiyun been reinitialized, the ethernet MAC address receives a default 84*4882a593Smuzhiyun value whose least significant 6 bits come from DIP switches 1-6. 85*4882a593Smuzhiyun The default is 00:50:C2:13:6F:xx where xx ranges from 0..3F 86*4882a593Smuzhiyun according to the DIP switches, where "on"==1 and "off"==0, and 87*4882a593Smuzhiyun switch 1 is the least-significant bit. 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun After initial startup, the MAC address is stored in the U-Boot 90*4882a593Smuzhiyun environment variable 'ethaddr'. The user may change this to any 91*4882a593Smuzhiyun other address with the "setenv" comamnd. After the environment 92*4882a593Smuzhiyun has been saved to Flash by the "saveenv" command, this will be 93*4882a593Smuzhiyun used and the DIP switches no longer consulted. DIP swithes 1-6 94*4882a593Smuzhiyun may then be used for application purposes. 95*4882a593Smuzhiyun 96*4882a593SmuzhiyunThe KC705 board contains 4-way DIP switch, way 1 is the boot mapping 97*4882a593Smuzhiyunswitch and ways 2-4 control the low three bits of the MAC address. 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun 100*4882a593SmuzhiyunLimitation of SDRAM Size for OCD Debugging on the LX60 101*4882a593Smuzhiyun------------------------------------------------------ 102*4882a593Smuzhiyun 103*4882a593SmuzhiyunThe XT-AV60 board has only 128 KB of SDRAM that can be mapped 104*4882a593Smuzhiyunto the system ROM address space for debugging a ROM image under 105*4882a593SmuzhiyunOCD/JTAG. This limits the useful size of U-Boot to 128 KB (0x20000) 106*4882a593Smuzhiyunor the first 2 sectors of the flash. 107*4882a593Smuzhiyun 108*4882a593SmuzhiyunThis can pose a problem if all the sources are compiled with -O0 109*4882a593Smuzhiyunfor debugging. The code size is then too large, in which case it 110*4882a593Smuzhiyunwould be necessary to temporarily alter the linker script to place 111*4882a593Smuzhiyunthe load addresses (LMA) in the RAM (VMA) so that OCD loads U-Boot 112*4882a593Smuzhiyundirectly there and does not unpack. In practice this is not really 113*4882a593Smuzhiyunnecessary as long as only a limited set of sources need to be 114*4882a593Smuzhiyundebugged, because the image can still fit into the 128 KB SRAM. 115*4882a593Smuzhiyun 116*4882a593SmuzhiyunThe recommended procedure for debugging is to first build U-Boot 117*4882a593Smuzhiyunwith the default optimization level (-Os), and then touch and 118*4882a593Smuzhiyunrebuild incrementally with -O0 so that only the touched sources 119*4882a593Smuzhiyunare recompiled with -O0. To build with -O0, pass it in the KCFLAGS 120*4882a593Smuzhiyunvariable to make. 121*4882a593Smuzhiyun 122*4882a593SmuzhiyunBecause this problem is easy to fall into and difficult to debug 123*4882a593Smuzhiyunif one doesn't expect it, the linker script provides a link-time 124*4882a593Smuzhiyuncheck and fatal error message if the image size exceeds 128 KB. 125*4882a593Smuzhiyun 126