1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2013
3*4882a593Smuzhiyun * David Feng <fenghua@phytium.com.cn>
4*4882a593Smuzhiyun * Sharma Bhupesh <bhupesh.sharma@freescale.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <malloc.h>
11*4882a593Smuzhiyun #include <errno.h>
12*4882a593Smuzhiyun #include <netdev.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun #include <linux/compiler.h>
15*4882a593Smuzhiyun #include <dm/platform_data/serial_pl01x.h>
16*4882a593Smuzhiyun #include "pcie.h"
17*4882a593Smuzhiyun #include <asm/armv8/mmu.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun static const struct pl01x_serial_platdata serial_platdata = {
22*4882a593Smuzhiyun .base = V2M_UART0,
23*4882a593Smuzhiyun .type = TYPE_PL011,
24*4882a593Smuzhiyun .clock = CONFIG_PL011_CLOCK,
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun U_BOOT_DEVICE(vexpress_serials) = {
28*4882a593Smuzhiyun .name = "serial_pl01x",
29*4882a593Smuzhiyun .platdata = &serial_platdata,
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static struct mm_region vexpress64_mem_map[] = {
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun .virt = 0x0UL,
35*4882a593Smuzhiyun .phys = 0x0UL,
36*4882a593Smuzhiyun .size = 0x80000000UL,
37*4882a593Smuzhiyun .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
38*4882a593Smuzhiyun PTE_BLOCK_NON_SHARE |
39*4882a593Smuzhiyun PTE_BLOCK_PXN | PTE_BLOCK_UXN
40*4882a593Smuzhiyun }, {
41*4882a593Smuzhiyun .virt = 0x80000000UL,
42*4882a593Smuzhiyun .phys = 0x80000000UL,
43*4882a593Smuzhiyun .size = 0xff80000000UL,
44*4882a593Smuzhiyun .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
45*4882a593Smuzhiyun PTE_BLOCK_INNER_SHARE
46*4882a593Smuzhiyun }, {
47*4882a593Smuzhiyun /* List terminator */
48*4882a593Smuzhiyun 0,
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun struct mm_region *mem_map = vexpress64_mem_map;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* This function gets replaced by platforms supporting PCIe.
55*4882a593Smuzhiyun * The replacement function, eg. on Juno, initialises the PCIe bus.
56*4882a593Smuzhiyun */
vexpress64_pcie_init(void)57*4882a593Smuzhiyun __weak void vexpress64_pcie_init(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
board_init(void)61*4882a593Smuzhiyun int board_init(void)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun vexpress64_pcie_init();
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
dram_init(void)67*4882a593Smuzhiyun int dram_init(void)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun gd->ram_size = PHYS_SDRAM_1_SIZE;
70*4882a593Smuzhiyun return 0;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
dram_init_banksize(void)73*4882a593Smuzhiyun int dram_init_banksize(void)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
76*4882a593Smuzhiyun gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
77*4882a593Smuzhiyun #ifdef PHYS_SDRAM_2
78*4882a593Smuzhiyun gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
79*4882a593Smuzhiyun gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
80*4882a593Smuzhiyun #endif
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun return 0;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun * Board specific reset that is system reset.
87*4882a593Smuzhiyun */
reset_cpu(ulong addr)88*4882a593Smuzhiyun void reset_cpu(ulong addr)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /*
93*4882a593Smuzhiyun * Board specific ethernet initialization routine.
94*4882a593Smuzhiyun */
board_eth_init(bd_t * bis)95*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun int rc = 0;
98*4882a593Smuzhiyun #ifdef CONFIG_SMC91111
99*4882a593Smuzhiyun rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
100*4882a593Smuzhiyun #endif
101*4882a593Smuzhiyun #ifdef CONFIG_SMC911X
102*4882a593Smuzhiyun rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
103*4882a593Smuzhiyun #endif
104*4882a593Smuzhiyun return rc;
105*4882a593Smuzhiyun }
106