1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2016 Linaro
3*4882a593Smuzhiyun * Jon Medhurst <tixy@linaro.org>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * TC2 specific code for Versatile Express.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <asm/armv7.h>
11*4882a593Smuzhiyun #include <asm/io.h>
12*4882a593Smuzhiyun #include <asm/u-boot.h>
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <linux/libfdt.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define SCC_BASE 0x7fff0000
17*4882a593Smuzhiyun
armv7_boot_nonsec_default(void)18*4882a593Smuzhiyun bool armv7_boot_nonsec_default(void)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun #ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
21*4882a593Smuzhiyun return false
22*4882a593Smuzhiyun #else
23*4882a593Smuzhiyun /*
24*4882a593Smuzhiyun * The Serial Configuration Controller (SCC) register at address 0x700
25*4882a593Smuzhiyun * contains flags for configuring the behaviour of the Boot Monitor
26*4882a593Smuzhiyun * (which CPUs execute from reset). Two of these bits are of interest:
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * bit 12 = Use per-cpu mailboxes for power management
29*4882a593Smuzhiyun * bit 13 = Power down the non-boot cluster
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun * It is only when both of these are false that U-Boot's current
32*4882a593Smuzhiyun * implementation of 'nonsec' mode can work as expected because we
33*4882a593Smuzhiyun * rely on getting all CPUs to execute _nonsec_init, so let's check that.
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 0;
36*4882a593Smuzhiyun #endif
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #ifdef CONFIG_OF_BOARD_SETUP
40*4882a593Smuzhiyun int ft_board_setup(void *fdt, bd_t *bd)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun int offset, tmp, len;
43*4882a593Smuzhiyun const struct fdt_property *prop;
44*4882a593Smuzhiyun const char *cci_compatible = "arm,cci-400-ctrl-if";
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #ifdef CONFIG_ARMV7_NONSEC
47*4882a593Smuzhiyun if (!armv7_boot_nonsec())
48*4882a593Smuzhiyun return 0;
49*4882a593Smuzhiyun #else
50*4882a593Smuzhiyun return 0;
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun /* Booting in nonsec mode, disable CCI access */
53*4882a593Smuzhiyun offset = fdt_path_offset(fdt, "/cpus");
54*4882a593Smuzhiyun if (offset < 0) {
55*4882a593Smuzhiyun printf("couldn't find /cpus\n");
56*4882a593Smuzhiyun return offset;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* delete cci-control-port in each cpu node */
60*4882a593Smuzhiyun for (tmp = fdt_first_subnode(fdt, offset); tmp >= 0;
61*4882a593Smuzhiyun tmp = fdt_next_subnode(fdt, tmp))
62*4882a593Smuzhiyun fdt_delprop(fdt, tmp, "cci-control-port");
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* disable all ace cci slave ports */
65*4882a593Smuzhiyun offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
66*4882a593Smuzhiyun cci_compatible, 20);
67*4882a593Smuzhiyun while (offset > 0) {
68*4882a593Smuzhiyun prop = fdt_get_property(fdt, offset, "interface-type",
69*4882a593Smuzhiyun &len);
70*4882a593Smuzhiyun if (!prop)
71*4882a593Smuzhiyun continue;
72*4882a593Smuzhiyun if (len < 4)
73*4882a593Smuzhiyun continue;
74*4882a593Smuzhiyun if (strcmp(prop->data, "ace"))
75*4882a593Smuzhiyun continue;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun fdt_setprop_string(fdt, offset, "status", "disabled");
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
80*4882a593Smuzhiyun cci_compatible, 20);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return 0;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun #endif /* CONFIG_OF_BOARD_SETUP */
86