1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2011 3*4882a593Smuzhiyun * Linaro 4*4882a593Smuzhiyun * Linus Walleij <linus.walleij@linaro.org> 5*4882a593Smuzhiyun * Register definitions for the External Bus Interface (EBI) 6*4882a593Smuzhiyun * found in the ARM Integrator AP and CP reference designs 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __ARM_EBI_H 12*4882a593Smuzhiyun #define __ARM_EBI_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define EBI_BASE 0x12000000 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define EBI_CSR0_REG 0x00 /* CS0 = Boot ROM */ 17*4882a593Smuzhiyun #define EBI_CSR1_REG 0x04 /* CS1 = Flash */ 18*4882a593Smuzhiyun #define EBI_CSR2_REG 0x08 /* CS2 = SSRAM */ 19*4882a593Smuzhiyun #define EBI_CSR3_REG 0x0C /* CS3 = Expansion memory */ 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun * The four upper bits are the waitstates for each chip select 22*4882a593Smuzhiyun * 0x00 = 2 cycles, 0x10 = 3 cycles, ... 0xe0 = 16 cycles, 0xf0 = 16 cycles 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun #define EBI_CSR_WAIT_MASK 0xF0 25*4882a593Smuzhiyun /* Whether memory is synchronous or asynchronous */ 26*4882a593Smuzhiyun #define EBI_CSR_SYNC_MASK 0xF7 27*4882a593Smuzhiyun #define EBI_CSR_ASYNC 0x00 28*4882a593Smuzhiyun #define EBI_CSR_SYNC 0x08 29*4882a593Smuzhiyun /* Whether memory is write enabled or not */ 30*4882a593Smuzhiyun #define EBI_CSR_WREN_MASK 0xFB 31*4882a593Smuzhiyun #define EBI_CSR_WREN_DISABLE 0x00 32*4882a593Smuzhiyun #define EBI_CSR_WREN_ENABLE 0x04 33*4882a593Smuzhiyun /* Memory bit width for each chip select */ 34*4882a593Smuzhiyun #define EBI_CSR_MEMSIZE_MASK 0xFC 35*4882a593Smuzhiyun #define EBI_CSR_MEMSIZE_8BIT 0x00 36*4882a593Smuzhiyun #define EBI_CSR_MEMSIZE_16BIT 0x01 37*4882a593Smuzhiyun #define EBI_CSR_MEMSIZE_32BIT 0x02 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* 40*4882a593Smuzhiyun * The lock register need to be written with 0xa05f before anything in the 41*4882a593Smuzhiyun * EBI can be changed. 42*4882a593Smuzhiyun */ 43*4882a593Smuzhiyun #define EBI_LOCK_REG 0x20 44*4882a593Smuzhiyun #define EBI_UNLOCK_MAGIC 0xA05F 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #endif 47