1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2013 Boundary Devices 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Device Configuration Data (DCD) 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Each entry must have the format: 9*4882a593Smuzhiyun * Addr-type Address Value 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * where: 12*4882a593Smuzhiyun * Addr-type register length (1,2 or 4 bytes) 13*4882a593Smuzhiyun * Address absolute address of the register 14*4882a593Smuzhiyun * value value to be stored in the register 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/* DDR IO TYPE */ 18*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 19*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 20*4882a593Smuzhiyun/* Clock */ 21*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00000030 22*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00000030 23*4882a593Smuzhiyun/* Address */ 24*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_CAS, 0x00000030 25*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_RAS, 0x00000030 26*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 27*4882a593Smuzhiyun/* Control */ 28*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_RESET, 0x00000030 29*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 30*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 31*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 32*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 33*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 34*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 35*4882a593Smuzhiyun/* Data Strobe */ 36*4882a593SmuzhiyunDATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 37*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 38*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 39*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 40*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 41*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 42*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 43*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 44*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 45*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 46*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B0DS, 0x00000030 47*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B1DS, 0x00000030 48*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B2DS, 0x00000030 49*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B3DS, 0x00000030 50*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B4DS, 0x00000030 51*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B5DS, 0x00000030 52*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B6DS, 0x00000030 53*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B7DS, 0x00000030 54*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM0, 0x00000030 55*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM1, 0x00000030 56*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM2, 0x00000030 57*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM3, 0x00000030 58*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM4, 0x00000030 59*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM5, 0x00000030 60*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM6, 0x00000030 61*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM7, 0x00000030 62