xref: /OK3568_Linux_fs/u-boot/board/advantech/dms-ba16/micron-1g.cfg (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/* Calibrations */
2*4882a593Smuzhiyun/* ZQ */
3*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPZQHWCTRL,  0xa1390003
4*4882a593Smuzhiyun/* write leveling */
5*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001F001F
6*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F
7*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001F001F
8*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
9*4882a593Smuzhiyun/* Read DQS Gating calibration */
10*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPDGCTRL0,   0x43480350
11*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPDGCTRL1,   0x033C0340
12*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPDGCTRL0,   0x43480350
13*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPDGCTRL1,   0x03340314
14*4882a593Smuzhiyun/* Read calibration */
15*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDLCTL,   0x382E2C32
16*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDLCTL,   0x38363044
17*4882a593Smuzhiyun/* Write calibration */
18*4882a593SmuzhiyunDATA 4 MX6_MMDC_P0_MPWRDLCTL,    0x3A38403A
19*4882a593SmuzhiyunDATA 4 MX6_MMDC_P1_MPWRDLCTL,    0x4432483E
20*4882a593Smuzhiyun/* read data bit delay */
21*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
22*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
23*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
24*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
25*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
26*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
27*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
28*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun/* Complete calibration by forced measurment */
31*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPMUR0,	0x00000800
32*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPMUR0,	0x00000800
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun/* MMDC init */
35*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDPDC,      0x00020036
36*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDOTC,      0x09444040
37*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG0,     0x555A79A5
38*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG1,     0xDB538E64
39*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG2,     0x01ff00db
40*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDMISC,     0x00001740
41*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x00008000
42*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDRWD,      0x000026d2
43*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDOR,       0x005a1023
44*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDASP,      0x00000027
45*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCTL,      0x831a0000
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun/* Initialize memory */
48*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x04088032
49*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x0408803a
50*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x00008033
51*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x0000803b
52*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x00048031
53*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x00048039
54*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x09408030
55*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x09408038
56*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x04008040
57*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x04008048
58*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDREF,      0x00005800
59*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPODTCTRL,  0x00033337
60*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPODTCTRL,  0x00033337
61*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDPDC,      0x00025576
62*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MAPSR,      0x00011006
63*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR,      0x00000000
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