xref: /OK3568_Linux_fs/u-boot/board/Synology/ds109/openocd.cfg (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# Synology DS109
2*4882a593Smuzhiyun
3*4882a593Smuzhiyuninterface ftdi
4*4882a593Smuzhiyunftdi_vid_pid 0x0403 0x6010
5*4882a593Smuzhiyun
6*4882a593Smuzhiyunftdi_layout_init 0x0008 0x000b
7*4882a593Smuzhiyunftdi_layout_signal nTRST -data 0x0010 -oe 0x0010
8*4882a593Smuzhiyunftdi_layout_signal nSRST -data 0x0040 -oe 0x0040
9*4882a593Smuzhiyun
10*4882a593Smuzhiyunadapter_khz 2000
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun# length of reset signal: [ms]
13*4882a593Smuzhiyunadapter_nsrst_assert_width 1000
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun# don't talk to JTAG after reset for: [ms]
16*4882a593Smuzhiyunadapter_nsrst_delay 200
17*4882a593Smuzhiyun
18*4882a593Smuzhiyunsource [find target/feroceon.cfg]
19*4882a593Smuzhiyun
20*4882a593Smuzhiyunreset_config trst_and_srst srst_nogate
21*4882a593Smuzhiyun
22*4882a593Smuzhiyunproc ds109_init { } {
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	# We need to assert DBGRQ while holding nSRST down.
25*4882a593Smuzhiyun	# However DBGACK will be set only when nSRST is released.
26*4882a593Smuzhiyun	# Furthermore, the JTAG interface doesn't respond at all when
27*4882a593Smuzhiyun	# the CPU is in the WFI (wait for interrupts) state, so it is
28*4882a593Smuzhiyun	# possible that initial tap examination failed.  So let's
29*4882a593Smuzhiyun	# re-examine the target again here when nSRST is asserted which
30*4882a593Smuzhiyun	# should then succeed.
31*4882a593Smuzhiyun	jtag_reset 0 1
32*4882a593Smuzhiyun	feroceon.cpu arp_examine
33*4882a593Smuzhiyun	halt 0
34*4882a593Smuzhiyun	jtag_reset 0 0
35*4882a593Smuzhiyun	wait_halt
36*4882a593Smuzhiyun	#reset run
37*4882a593Smuzhiyun	#soft_reset_halt
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	arm mcr 15 0 0 1 0 0x00052078
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	mww 0xD00100e0 0x1b1b1b9b ;#
42*4882a593Smuzhiyun	mww 0xD0020134 0xbbbbbbbb ;#
43*4882a593Smuzhiyun	mww 0xD0020138 0x00bbbbbb ;#
44*4882a593Smuzhiyun	mww 0xD0001400 0x43000C30 ;#  DDR SDRAM Configuration Register
45*4882a593Smuzhiyun	mww 0xD0001404 0x39743000 ;#  Dunit Control Low Register
46*4882a593Smuzhiyun	mww 0xD0001408 0x22125551 ;#  DDR SDRAM Timing (Low) Register
47*4882a593Smuzhiyun	mww 0xD000140C 0x00000833 ;#  DDR SDRAM Timing (High) Register
48*4882a593Smuzhiyun	mww 0xD0001410 0x0000000d ;#  DDR SDRAM Address Control Register
49*4882a593Smuzhiyun	mww 0xD0001414 0x00000000 ;#  DDR SDRAM Open Pages Control Register
50*4882a593Smuzhiyun	mww 0xD0001418 0x00000000 ;#  DDR SDRAM Operation Register
51*4882a593Smuzhiyun	mww 0xD000141C 0x00000C62 ;#  DDR SDRAM Mode Register
52*4882a593Smuzhiyun	mww 0xD0001420 0x00000042 ;#  DDR SDRAM Extended Mode Register
53*4882a593Smuzhiyun	mww 0xD0001424 0x0000F1FF ;#  Dunit Control High Register
54*4882a593Smuzhiyun	mww 0xD0001428 0x00085520 ;#  Dunit Control High Register
55*4882a593Smuzhiyun	mww 0xD000147c 0x00008552 ;#  Dunit Control High Register
56*4882a593Smuzhiyun	mww 0xD0001500 0x00000000 ;#
57*4882a593Smuzhiyun	mww 0xD0001504 0x07FFFFF1 ;#  CS0n Size Register
58*4882a593Smuzhiyun	mww 0xD0001508 0x10000000 ;#  CS1n Base Register
59*4882a593Smuzhiyun	mww 0xD000150C 0x00000000 ;#  CS1n Size Register
60*4882a593Smuzhiyun	mww 0xD0001510 0x20000000 ;#
61*4882a593Smuzhiyun	mww 0xD0001514 0x00000000 ;#  CS2n Size Register
62*4882a593Smuzhiyun	mww 0xD000151C 0x00000000 ;#  CS3n Size Register
63*4882a593Smuzhiyun	mww 0xD0001494 0x003C0000 ;#  DDR2 SDRAM ODT Control (Low) Register
64*4882a593Smuzhiyun	mww 0xD0001498 0x00000000 ;#  DDR2 SDRAM ODT Control (High) REgister
65*4882a593Smuzhiyun	mww 0xD000149C 0x0000F80F ;#  DDR2 Dunit ODT Control Register
66*4882a593Smuzhiyun	mww 0xD0001480 0x00000001 ;#  DDR SDRAM Initialization Control Register
67*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#  Main IRQ Interrupt Mask Register
68*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
69*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
70*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
71*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
72*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
73*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
74*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
75*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
76*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
77*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
78*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
79*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
80*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
81*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
82*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
83*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
84*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
85*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
86*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
87*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
88*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
89*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
90*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
91*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
92*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
93*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
94*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
95*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
96*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
97*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
98*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
99*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
100*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
101*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
102*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
103*4882a593Smuzhiyun	mww 0xD0020204 0x00000000 ;#              "
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	mww 0xD0010000 0x01111111 ;#  MPP  0 to 7
106*4882a593Smuzhiyun	mww 0xD0010004 0x11113322 ;#  MPP  8 to 15
107*4882a593Smuzhiyun	mww 0xD0010008 0x00001111 ;#  MPP 16 to 23
108*4882a593Smuzhiyun}
109*4882a593Smuzhiyun
110*4882a593Smuzhiyunproc ds109_load { } {
111*4882a593Smuzhiyun	# load u-Boot into RAM and execute it
112*4882a593Smuzhiyun	ds109_init
113*4882a593Smuzhiyun	load_image u-boot.bin 0x00600000 bin
114*4882a593Smuzhiyun	resume 0x00600000
115*4882a593Smuzhiyun}
116