1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2009 3*4882a593Smuzhiyun * Net Insight <www.netinsight.net> 4*4882a593Smuzhiyun * Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Based on sheevaplug.h: 7*4882a593Smuzhiyun * (C) Copyright 2009 8*4882a593Smuzhiyun * Marvell Semiconductor <www.marvell.com> 9*4882a593Smuzhiyun * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef __OPENRD_BASE_H 15*4882a593Smuzhiyun #define __OPENRD_BASE_H 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define OPENRD_OE_LOW (~(1<<28)) /* RS232 / RS485 */ 18*4882a593Smuzhiyun #define OPENRD_OE_HIGH (~(1<<2)) /* SD / UART1 */ 19*4882a593Smuzhiyun #define OPENRD_OE_VAL_LOW (0) /* Sel RS232 */ 20*4882a593Smuzhiyun #define OPENRD_OE_VAL_HIGH (1 << 2) /* Sel SD */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* PHY related */ 23*4882a593Smuzhiyun #define MV88E1116_LED_FCTRL_REG 10 24*4882a593Smuzhiyun #define MV88E1116_CPRSP_CR3_REG 21 25*4882a593Smuzhiyun #define MV88E1116_MAC_CTRL_REG 21 26*4882a593Smuzhiyun #define MV88E1116_PGADR_REG 22 27*4882a593Smuzhiyun #define MV88E1116_RGMII_TXTM_CTRL (1 << 4) 28*4882a593Smuzhiyun #define MV88E1116_RGMII_RXTM_CTRL (1 << 5) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #endif /* __OPENRD_BASE_H */ 31