1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Based on Kirkwood support:
5*4882a593Smuzhiyun * (C) Copyright 2009
6*4882a593Smuzhiyun * Marvell Semiconductor <www.marvell.com>
7*4882a593Smuzhiyun * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <command.h>
14*4882a593Smuzhiyun #include <asm/mach-types.h>
15*4882a593Smuzhiyun #include <asm/arch/cpu.h>
16*4882a593Smuzhiyun #include <asm/arch/soc.h>
17*4882a593Smuzhiyun #include <asm/arch/mpp.h>
18*4882a593Smuzhiyun #include <asm/arch/gpio.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include "netspace_v2.h"
21*4882a593Smuzhiyun #include "../common/common.h"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
24*4882a593Smuzhiyun
board_early_init_f(void)25*4882a593Smuzhiyun int board_early_init_f(void)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun /* Gpio configuration */
28*4882a593Smuzhiyun mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
29*4882a593Smuzhiyun NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* Multi-Purpose Pins Functionality configuration */
32*4882a593Smuzhiyun static const u32 kwmpp_config[] = {
33*4882a593Smuzhiyun MPP0_SPI_SCn,
34*4882a593Smuzhiyun MPP1_SPI_MOSI,
35*4882a593Smuzhiyun MPP2_SPI_SCK,
36*4882a593Smuzhiyun MPP3_SPI_MISO,
37*4882a593Smuzhiyun MPP4_NF_IO6,
38*4882a593Smuzhiyun MPP5_NF_IO7,
39*4882a593Smuzhiyun MPP6_SYSRST_OUTn,
40*4882a593Smuzhiyun MPP7_GPO, /* Fan speed (bit 1) */
41*4882a593Smuzhiyun MPP8_TW_SDA,
42*4882a593Smuzhiyun MPP9_TW_SCK,
43*4882a593Smuzhiyun MPP10_UART0_TXD,
44*4882a593Smuzhiyun MPP11_UART0_RXD,
45*4882a593Smuzhiyun MPP12_GPO, /* Red led */
46*4882a593Smuzhiyun MPP14_GPIO, /* USB fuse */
47*4882a593Smuzhiyun MPP16_GPIO, /* SATA 0 power */
48*4882a593Smuzhiyun MPP17_GPIO, /* SATA 1 power */
49*4882a593Smuzhiyun MPP18_NF_IO0,
50*4882a593Smuzhiyun MPP19_NF_IO1,
51*4882a593Smuzhiyun MPP20_SATA1_ACTn,
52*4882a593Smuzhiyun MPP21_SATA0_ACTn,
53*4882a593Smuzhiyun MPP22_GPIO, /* Fan speed (bit 0) */
54*4882a593Smuzhiyun MPP23_GPIO, /* Fan power */
55*4882a593Smuzhiyun MPP24_GPIO, /* USB mode select */
56*4882a593Smuzhiyun MPP25_GPIO, /* Fan rotation fail */
57*4882a593Smuzhiyun MPP26_GPIO, /* USB vbus-in detection */
58*4882a593Smuzhiyun MPP28_GPIO, /* USB enable vbus-out */
59*4882a593Smuzhiyun MPP29_GPIO, /* Blue led (slow register) */
60*4882a593Smuzhiyun MPP30_GPIO, /* Blue led (command register) */
61*4882a593Smuzhiyun MPP31_GPIO, /* Board power off */
62*4882a593Smuzhiyun MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */
63*4882a593Smuzhiyun MPP33_GPIO, /* Fan speed (bit 2) */
64*4882a593Smuzhiyun 0
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun kirkwood_mpp_conf(kwmpp_config, NULL);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
board_init(void)71*4882a593Smuzhiyun int board_init(void)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun /* Machine number */
74*4882a593Smuzhiyun gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* Boot parameters address */
77*4882a593Smuzhiyun gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun return 0;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #if defined(CONFIG_MISC_INIT_R)
misc_init_r(void)83*4882a593Smuzhiyun int misc_init_r(void)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
86*4882a593Smuzhiyun if (!env_get("ethaddr")) {
87*4882a593Smuzhiyun uchar mac[6];
88*4882a593Smuzhiyun if (lacie_read_mac_address(mac) == 0)
89*4882a593Smuzhiyun eth_env_set_enetaddr("ethaddr", mac);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun #endif
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun #endif
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
97*4882a593Smuzhiyun /* Configure and initialize PHY */
reset_phy(void)98*4882a593Smuzhiyun void reset_phy(void)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun #if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
101*4882a593Smuzhiyun mv_phy_88e1318_init("egiga0", 0);
102*4882a593Smuzhiyun #else
103*4882a593Smuzhiyun mv_phy_88e1116_init("egiga0", 8);
104*4882a593Smuzhiyun #endif
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun #endif
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun #if defined(CONFIG_KIRKWOOD_GPIO)
109*4882a593Smuzhiyun /* Return GPIO button status */
110*4882a593Smuzhiyun static int
do_read_button(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])111*4882a593Smuzhiyun do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun U_BOOT_CMD(button, 1, 1, do_read_button,
117*4882a593Smuzhiyun "Return GPIO button status 0=off 1=on", "");
118*4882a593Smuzhiyun #endif
119