xref: /OK3568_Linux_fs/u-boot/board/LaCie/net2big_v2/net2big_v2.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Based on Kirkwood support:
5*4882a593Smuzhiyun  * (C) Copyright 2009
6*4882a593Smuzhiyun  * Marvell Semiconductor <www.marvell.com>
7*4882a593Smuzhiyun  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <command.h>
14*4882a593Smuzhiyun #include <i2c.h>
15*4882a593Smuzhiyun #include <asm/mach-types.h>
16*4882a593Smuzhiyun #include <asm/arch/cpu.h>
17*4882a593Smuzhiyun #include <asm/arch/soc.h>
18*4882a593Smuzhiyun #include <asm/arch/mpp.h>
19*4882a593Smuzhiyun #include <asm/arch/gpio.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include "net2big_v2.h"
22*4882a593Smuzhiyun #include "../common/common.h"
23*4882a593Smuzhiyun #include "../common/cpld-gpio-bus.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
26*4882a593Smuzhiyun 
board_early_init_f(void)27*4882a593Smuzhiyun int board_early_init_f(void)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun 	/* GPIO configuration */
30*4882a593Smuzhiyun 	mvebu_config_gpio(NET2BIG_V2_OE_VAL_LOW, NET2BIG_V2_OE_VAL_HIGH,
31*4882a593Smuzhiyun 			  NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH);
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun 	/* Multi-Purpose Pins Functionality configuration */
34*4882a593Smuzhiyun 	static const u32 kwmpp_config[] = {
35*4882a593Smuzhiyun 		MPP0_SPI_SCn,
36*4882a593Smuzhiyun 		MPP1_SPI_MOSI,
37*4882a593Smuzhiyun 		MPP2_SPI_SCK,
38*4882a593Smuzhiyun 		MPP3_SPI_MISO,
39*4882a593Smuzhiyun 		MPP6_SYSRST_OUTn,
40*4882a593Smuzhiyun 		MPP7_GPO,		/* Request power-off */
41*4882a593Smuzhiyun 		MPP8_TW_SDA,
42*4882a593Smuzhiyun 		MPP9_TW_SCK,
43*4882a593Smuzhiyun 		MPP10_UART0_TXD,
44*4882a593Smuzhiyun 		MPP11_UART0_RXD,
45*4882a593Smuzhiyun 		MPP13_GPIO,		/* Rear power switch (on|auto) */
46*4882a593Smuzhiyun 		MPP14_GPIO,		/* USB fuse alarm */
47*4882a593Smuzhiyun 		MPP15_GPIO,		/* Rear power switch (auto|off) */
48*4882a593Smuzhiyun 		MPP16_GPIO,		/* SATA HDD1 power */
49*4882a593Smuzhiyun 		MPP17_GPIO,		/* SATA HDD2 power */
50*4882a593Smuzhiyun 		MPP20_SATA1_ACTn,
51*4882a593Smuzhiyun 		MPP21_SATA0_ACTn,
52*4882a593Smuzhiyun 		MPP24_GPIO,		/* USB mode select */
53*4882a593Smuzhiyun 		MPP26_GPIO,		/* USB device vbus */
54*4882a593Smuzhiyun 		MPP28_GPIO,		/* USB enable host vbus */
55*4882a593Smuzhiyun 		MPP29_GPIO,		/* CPLD GPIO bus ALE */
56*4882a593Smuzhiyun 		MPP34_GPIO,		/* Rear Push button 0=on 1=off */
57*4882a593Smuzhiyun 		MPP35_GPIO,		/* Inhibit switch power-off */
58*4882a593Smuzhiyun 		MPP36_GPIO,		/* SATA HDD1 presence */
59*4882a593Smuzhiyun 		MPP37_GPIO,		/* SATA HDD2 presence */
60*4882a593Smuzhiyun 		MPP40_GPIO,		/* eSATA presence */
61*4882a593Smuzhiyun 		MPP44_GPIO,		/* CPLD GPIO bus (data 0) */
62*4882a593Smuzhiyun 		MPP45_GPIO,		/* CPLD GPIO bus (data 1) */
63*4882a593Smuzhiyun 		MPP46_GPIO,		/* CPLD GPIO bus (data 2) */
64*4882a593Smuzhiyun 		MPP47_GPIO,		/* CPLD GPIO bus (addr 0) */
65*4882a593Smuzhiyun 		MPP48_GPIO,		/* CPLD GPIO bus (addr 1) */
66*4882a593Smuzhiyun 		MPP49_GPIO,		/* CPLD GPIO bus (addr 2) */
67*4882a593Smuzhiyun 		0
68*4882a593Smuzhiyun 	};
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	kirkwood_mpp_conf(kwmpp_config, NULL);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
board_init(void)75*4882a593Smuzhiyun int board_init(void)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	/* Machine number */
78*4882a593Smuzhiyun 	gd->bd->bi_arch_number = MACH_TYPE_NET2BIG_V2;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	/* Boot parameters address */
81*4882a593Smuzhiyun 	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	return 0;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #if defined(CONFIG_MISC_INIT_R)
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_G762_ADDR)
89*4882a593Smuzhiyun /*
90*4882a593Smuzhiyun  * Start I2C fan (GMT G762 controller)
91*4882a593Smuzhiyun  */
init_fan(void)92*4882a593Smuzhiyun static void init_fan(void)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	u8 data;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	i2c_set_bus_num(0);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	/* Enable open-loop and PWM modes */
99*4882a593Smuzhiyun 	data = 0x20;
100*4882a593Smuzhiyun 	if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
101*4882a593Smuzhiyun 		      G762_REG_FAN_CMD1, 1, &data, 1) != 0)
102*4882a593Smuzhiyun 		goto err;
103*4882a593Smuzhiyun 	data = 0;
104*4882a593Smuzhiyun 	if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
105*4882a593Smuzhiyun 		      G762_REG_SET_CNT, 1, &data, 1) != 0)
106*4882a593Smuzhiyun 		goto err;
107*4882a593Smuzhiyun 	/*
108*4882a593Smuzhiyun 	 * RPM to PWM (set_out register) fan speed conversion array:
109*4882a593Smuzhiyun 	 * 0    0x00
110*4882a593Smuzhiyun 	 * 1500	0x04
111*4882a593Smuzhiyun 	 * 2800	0x08
112*4882a593Smuzhiyun 	 * 3400	0x0C
113*4882a593Smuzhiyun 	 * 3700	0x10
114*4882a593Smuzhiyun 	 * 4400	0x20
115*4882a593Smuzhiyun 	 * 4700	0x30
116*4882a593Smuzhiyun 	 * 4800	0x50
117*4882a593Smuzhiyun 	 * 5200	0x80
118*4882a593Smuzhiyun 	 * 5400	0xC0
119*4882a593Smuzhiyun 	 * 5500	0xFF
120*4882a593Smuzhiyun 	 *
121*4882a593Smuzhiyun 	 * Start fan at low speed (2800 RPM):
122*4882a593Smuzhiyun 	 */
123*4882a593Smuzhiyun 	data = 0x08;
124*4882a593Smuzhiyun 	if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
125*4882a593Smuzhiyun 		      G762_REG_SET_OUT, 1, &data, 1) != 0)
126*4882a593Smuzhiyun 		goto err;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	return;
129*4882a593Smuzhiyun err:
130*4882a593Smuzhiyun 	printf("Error: failed to start I2C fan @%02x\n",
131*4882a593Smuzhiyun 	       CONFIG_SYS_I2C_G762_ADDR);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun #else
init_fan(void)134*4882a593Smuzhiyun static void init_fan(void) {}
135*4882a593Smuzhiyun #endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_G762_ADDR */
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun #if defined(CONFIG_NET2BIG_V2) && defined(CONFIG_KIRKWOOD_GPIO)
138*4882a593Smuzhiyun /*
139*4882a593Smuzhiyun  * CPLD GPIO bus:
140*4882a593Smuzhiyun  *
141*4882a593Smuzhiyun  * - address register : bit [0-2] -> GPIO [47-49]
142*4882a593Smuzhiyun  * - data register    : bit [0-2] -> GPIO [44-46]
143*4882a593Smuzhiyun  * - enable register  : GPIO 29
144*4882a593Smuzhiyun  */
145*4882a593Smuzhiyun static unsigned cpld_gpio_bus_addr[] = { 47, 48, 49 };
146*4882a593Smuzhiyun static unsigned cpld_gpio_bus_data[] = { 44, 45, 46 };
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static struct cpld_gpio_bus cpld_gpio_bus = {
149*4882a593Smuzhiyun 	.addr		= cpld_gpio_bus_addr,
150*4882a593Smuzhiyun 	.num_addr	= ARRAY_SIZE(cpld_gpio_bus_addr),
151*4882a593Smuzhiyun 	.data		= cpld_gpio_bus_data,
152*4882a593Smuzhiyun 	.num_data	= ARRAY_SIZE(cpld_gpio_bus_data),
153*4882a593Smuzhiyun 	.enable		= 29,
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun /*
157*4882a593Smuzhiyun  * LEDs configuration:
158*4882a593Smuzhiyun  *
159*4882a593Smuzhiyun  * The LEDs are controlled by a CPLD and can be configured through
160*4882a593Smuzhiyun  * the CPLD GPIO bus.
161*4882a593Smuzhiyun  *
162*4882a593Smuzhiyun  * Address register selection:
163*4882a593Smuzhiyun  *
164*4882a593Smuzhiyun  * addr | register
165*4882a593Smuzhiyun  * ----------------------------
166*4882a593Smuzhiyun  *   0  | front LED
167*4882a593Smuzhiyun  *   1  | front LED brightness
168*4882a593Smuzhiyun  *   2  | SATA LED brightness
169*4882a593Smuzhiyun  *   3  | SATA0 LED
170*4882a593Smuzhiyun  *   4  | SATA1 LED
171*4882a593Smuzhiyun  *   5  | SATA2 LED
172*4882a593Smuzhiyun  *   6  | SATA3 LED
173*4882a593Smuzhiyun  *   7  | SATA4 LED
174*4882a593Smuzhiyun  *
175*4882a593Smuzhiyun  * Data register configuration:
176*4882a593Smuzhiyun  *
177*4882a593Smuzhiyun  * data | LED brightness
178*4882a593Smuzhiyun  * -------------------------------------------------
179*4882a593Smuzhiyun  *   0  | min (off)
180*4882a593Smuzhiyun  *   -  | -
181*4882a593Smuzhiyun  *   7  | max
182*4882a593Smuzhiyun  *
183*4882a593Smuzhiyun  * data | front LED mode
184*4882a593Smuzhiyun  * -------------------------------------------------
185*4882a593Smuzhiyun  *   0  | fix off
186*4882a593Smuzhiyun  *   1  | fix blue on
187*4882a593Smuzhiyun  *   2  | fix red on
188*4882a593Smuzhiyun  *   3  | blink blue on=1 sec and blue off=1 sec
189*4882a593Smuzhiyun  *   4  | blink red on=1 sec and red off=1 sec
190*4882a593Smuzhiyun  *   5  | blink blue on=2.5 sec and red on=0.5 sec
191*4882a593Smuzhiyun  *   6  | blink blue on=1 sec and red on=1 sec
192*4882a593Smuzhiyun  *   7  | blink blue on=0.5 sec and blue off=2.5 sec
193*4882a593Smuzhiyun  *
194*4882a593Smuzhiyun  * data | SATA LED mode
195*4882a593Smuzhiyun  * -------------------------------------------------
196*4882a593Smuzhiyun  *   0  | fix off
197*4882a593Smuzhiyun  *   1  | SATA activity blink
198*4882a593Smuzhiyun  *   2  | fix red on
199*4882a593Smuzhiyun  *   3  | blink blue on=1 sec and blue off=1 sec
200*4882a593Smuzhiyun  *   4  | blink red on=1 sec and red off=1 sec
201*4882a593Smuzhiyun  *   5  | blink blue on=2.5 sec and red on=0.5 sec
202*4882a593Smuzhiyun  *   6  | blink blue on=1 sec and red on=1 sec
203*4882a593Smuzhiyun  *   7  | fix blue on
204*4882a593Smuzhiyun  */
init_leds(void)205*4882a593Smuzhiyun static void init_leds(void)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	/* Enable the front blue LED */
208*4882a593Smuzhiyun 	cpld_gpio_bus_write(&cpld_gpio_bus, 0, 1);
209*4882a593Smuzhiyun 	cpld_gpio_bus_write(&cpld_gpio_bus, 1, 3);
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	/* Configure SATA LEDs to blink in relation with the SATA activity */
212*4882a593Smuzhiyun 	cpld_gpio_bus_write(&cpld_gpio_bus, 3, 1);
213*4882a593Smuzhiyun 	cpld_gpio_bus_write(&cpld_gpio_bus, 4, 1);
214*4882a593Smuzhiyun 	cpld_gpio_bus_write(&cpld_gpio_bus, 2, 3);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun #else
init_leds(void)217*4882a593Smuzhiyun static void init_leds(void) {}
218*4882a593Smuzhiyun #endif /* CONFIG_NET2BIG_V2 && CONFIG_KIRKWOOD_GPIO */
219*4882a593Smuzhiyun 
misc_init_r(void)220*4882a593Smuzhiyun int misc_init_r(void)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun 	init_fan();
223*4882a593Smuzhiyun #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
224*4882a593Smuzhiyun 	if (!env_get("ethaddr")) {
225*4882a593Smuzhiyun 		uchar mac[6];
226*4882a593Smuzhiyun 		if (lacie_read_mac_address(mac) == 0)
227*4882a593Smuzhiyun 			eth_env_set_enetaddr("ethaddr", mac);
228*4882a593Smuzhiyun 	}
229*4882a593Smuzhiyun #endif
230*4882a593Smuzhiyun 	init_leds();
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	return 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun #endif /* CONFIG_MISC_INIT_R */
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
237*4882a593Smuzhiyun /* Configure and initialize PHY */
reset_phy(void)238*4882a593Smuzhiyun void reset_phy(void)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun 	mv_phy_88e1116_init("egiga0", 8);
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun #endif
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun #if defined(CONFIG_KIRKWOOD_GPIO)
245*4882a593Smuzhiyun /* Return GPIO push button status */
246*4882a593Smuzhiyun static int
do_read_push_button(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])247*4882a593Smuzhiyun do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun 	return !kw_gpio_get_value(NET2BIG_V2_GPIO_PUSH_BUTTON);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun U_BOOT_CMD(button, 1, 1, do_read_push_button,
253*4882a593Smuzhiyun 	   "Return GPIO push button status 0=off 1=on", "");
254*4882a593Smuzhiyun #endif
255