xref: /OK3568_Linux_fs/u-boot/board/LaCie/common/cpld-gpio-bus.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * cpld-gpio-bus.c: provides support for the CPLD GPIO bus found on some LaCie
3*4882a593Smuzhiyun  * boards (as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO
4*4882a593Smuzhiyun  * bus exposes two registers (address and data). Each of this register is made
5*4882a593Smuzhiyun  * up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD that
6*4882a593Smuzhiyun  * the registers have been updated.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Mostly this bus is used to configure the LEDs on LaCie boards.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Copyright (C) 2013 Simon Guinot <simon.guinot@sequanux.org>
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
13*4882a593Smuzhiyun  */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <asm/arch/gpio.h>
16*4882a593Smuzhiyun #include "cpld-gpio-bus.h"
17*4882a593Smuzhiyun 
cpld_gpio_bus_set_addr(struct cpld_gpio_bus * bus,unsigned addr)18*4882a593Smuzhiyun static void cpld_gpio_bus_set_addr(struct cpld_gpio_bus *bus, unsigned addr)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	int pin;
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	for (pin = 0; pin < bus->num_addr; pin++)
23*4882a593Smuzhiyun 		kw_gpio_set_value(bus->addr[pin], (addr >> pin) & 1);
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun 
cpld_gpio_bus_set_data(struct cpld_gpio_bus * bus,unsigned data)26*4882a593Smuzhiyun static void cpld_gpio_bus_set_data(struct cpld_gpio_bus *bus, unsigned data)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	int pin;
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun 	for (pin = 0; pin < bus->num_data; pin++)
31*4882a593Smuzhiyun 		kw_gpio_set_value(bus->data[pin], (data >> pin) & 1);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun 
cpld_gpio_bus_enable_select(struct cpld_gpio_bus * bus)34*4882a593Smuzhiyun static void cpld_gpio_bus_enable_select(struct cpld_gpio_bus *bus)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	/* The transfer is enabled on the raising edge. */
37*4882a593Smuzhiyun 	kw_gpio_set_value(bus->enable, 0);
38*4882a593Smuzhiyun 	kw_gpio_set_value(bus->enable, 1);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun 
cpld_gpio_bus_write(struct cpld_gpio_bus * bus,unsigned addr,unsigned value)41*4882a593Smuzhiyun void cpld_gpio_bus_write(struct cpld_gpio_bus *bus,
42*4882a593Smuzhiyun 			 unsigned addr, unsigned value)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	cpld_gpio_bus_set_addr(bus, addr);
45*4882a593Smuzhiyun 	cpld_gpio_bus_set_data(bus, value);
46*4882a593Smuzhiyun 	cpld_gpio_bus_enable_select(bus);
47*4882a593Smuzhiyun }
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