xref: /OK3568_Linux_fs/u-boot/board/BuR/common/common.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * common.c
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * common board functions for B&R boards
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
7*4882a593Smuzhiyun  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun #include <version.h>
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <errno.h>
15*4882a593Smuzhiyun #include <asm/arch/cpu.h>
16*4882a593Smuzhiyun #include <asm/arch/hardware.h>
17*4882a593Smuzhiyun #include <asm/arch/omap.h>
18*4882a593Smuzhiyun #include <asm/arch/clock.h>
19*4882a593Smuzhiyun #include <asm/arch/gpio.h>
20*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
21*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h>
22*4882a593Smuzhiyun #include <asm/io.h>
23*4882a593Smuzhiyun #include <asm/gpio.h>
24*4882a593Smuzhiyun #include <i2c.h>
25*4882a593Smuzhiyun #include <miiphy.h>
26*4882a593Smuzhiyun #include <cpsw.h>
27*4882a593Smuzhiyun #include <power/tps65217.h>
28*4882a593Smuzhiyun #include <lcd.h>
29*4882a593Smuzhiyun #include <fs.h>
30*4882a593Smuzhiyun #ifdef CONFIG_USE_FDT
31*4882a593Smuzhiyun   #include <fdt_support.h>
32*4882a593Smuzhiyun #endif
33*4882a593Smuzhiyun #include "bur_common.h"
34*4882a593Smuzhiyun #include "../../../drivers/video/am335x-fb.h"
35*4882a593Smuzhiyun #include <nand.h>
36*4882a593Smuzhiyun #include <fdt_simplefb.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #ifdef CONFIG_USE_FDT
43*4882a593Smuzhiyun   #define FDTPROP(b, c) fdt_getprop_u32_default(gd->fdt_blob, b, c, ~0UL)
44*4882a593Smuzhiyun   #define PATHTIM "/panel/display-timings/default"
45*4882a593Smuzhiyun   #define PATHINF "/panel/panel-info"
46*4882a593Smuzhiyun #endif
47*4882a593Smuzhiyun /* --------------------------------------------------------------------------*/
48*4882a593Smuzhiyun #if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \
49*4882a593Smuzhiyun 	!defined(CONFIG_SPL_BUILD)
lcdbacklight(int on)50*4882a593Smuzhiyun void lcdbacklight(int on)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun #ifdef CONFIG_USE_FDT
53*4882a593Smuzhiyun 	if (gd->fdt_blob == NULL) {
54*4882a593Smuzhiyun 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
55*4882a593Smuzhiyun 		return;
56*4882a593Smuzhiyun 	}
57*4882a593Smuzhiyun 	unsigned int driver = FDTPROP(PATHINF, "brightdrv");
58*4882a593Smuzhiyun 	unsigned int bright = FDTPROP(PATHINF, "brightdef");
59*4882a593Smuzhiyun 	unsigned int pwmfrq = FDTPROP(PATHINF, "brightfdim");
60*4882a593Smuzhiyun #else
61*4882a593Smuzhiyun 	unsigned int driver = env_get_ulong("ds1_bright_drv", 16, 0UL);
62*4882a593Smuzhiyun 	unsigned int bright = env_get_ulong("ds1_bright_def", 10, 50);
63*4882a593Smuzhiyun 	unsigned int pwmfrq = env_get_ulong("ds1_pwmfreq", 10, ~0UL);
64*4882a593Smuzhiyun #endif
65*4882a593Smuzhiyun 	unsigned int tmp;
66*4882a593Smuzhiyun 	struct gptimer *timerhw;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	if (on)
69*4882a593Smuzhiyun 		bright = bright != ~0UL ? bright : 50;
70*4882a593Smuzhiyun 	else
71*4882a593Smuzhiyun 		bright = 0;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	switch (driver) {
74*4882a593Smuzhiyun 	case 2:
75*4882a593Smuzhiyun 		timerhw = (struct gptimer *)DM_TIMER5_BASE;
76*4882a593Smuzhiyun 		break;
77*4882a593Smuzhiyun 	default:
78*4882a593Smuzhiyun 		timerhw = (struct gptimer *)DM_TIMER6_BASE;
79*4882a593Smuzhiyun 	}
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	switch (driver) {
82*4882a593Smuzhiyun 	case 0:	/* PMIC LED-Driver */
83*4882a593Smuzhiyun 		/* brightness level */
84*4882a593Smuzhiyun 		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
85*4882a593Smuzhiyun 				   TPS65217_WLEDCTRL2, bright, 0xFF);
86*4882a593Smuzhiyun 		/* current sink */
87*4882a593Smuzhiyun 		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
88*4882a593Smuzhiyun 				   TPS65217_WLEDCTRL1,
89*4882a593Smuzhiyun 				   bright != 0 ? 0x0A : 0x02,
90*4882a593Smuzhiyun 				   0xFF);
91*4882a593Smuzhiyun 		break;
92*4882a593Smuzhiyun 	case 1:
93*4882a593Smuzhiyun 	case 2: /* PWM using timer */
94*4882a593Smuzhiyun 		if (pwmfrq != ~0UL) {
95*4882a593Smuzhiyun 			timerhw->tiocp_cfg = TCFG_RESET;
96*4882a593Smuzhiyun 			udelay(10);
97*4882a593Smuzhiyun 			while (timerhw->tiocp_cfg & TCFG_RESET)
98*4882a593Smuzhiyun 				;
99*4882a593Smuzhiyun 			tmp = ~0UL-(V_OSCK/pwmfrq);	/* bottom value */
100*4882a593Smuzhiyun 			timerhw->tldr = tmp;
101*4882a593Smuzhiyun 			timerhw->tcrr = tmp;
102*4882a593Smuzhiyun 			tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright;
103*4882a593Smuzhiyun 			timerhw->tmar = tmp;
104*4882a593Smuzhiyun 			timerhw->tclr = (TCLR_PT | (2 << TCLR_TRG_SHIFT) |
105*4882a593Smuzhiyun 					TCLR_CE | TCLR_AR | TCLR_ST);
106*4882a593Smuzhiyun 		} else {
107*4882a593Smuzhiyun 			puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n");
108*4882a593Smuzhiyun 		}
109*4882a593Smuzhiyun 		break;
110*4882a593Smuzhiyun 	default:
111*4882a593Smuzhiyun 		puts("no suitable backlightdriver in env/dtb!\n");
112*4882a593Smuzhiyun 		break;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
load_lcdtiming(struct am335x_lcdpanel * panel)116*4882a593Smuzhiyun int load_lcdtiming(struct am335x_lcdpanel *panel)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	struct am335x_lcdpanel pnltmp;
119*4882a593Smuzhiyun #ifdef CONFIG_USE_FDT
120*4882a593Smuzhiyun 	u32 dtbprop;
121*4882a593Smuzhiyun 	char buf[32];
122*4882a593Smuzhiyun 	const char *nodep = 0;
123*4882a593Smuzhiyun 	int nodeoff;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	if (gd->fdt_blob == NULL) {
126*4882a593Smuzhiyun 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
127*4882a593Smuzhiyun 		return -1;
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun 	memcpy(&pnltmp, (void *)panel, sizeof(struct am335x_lcdpanel));
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	pnltmp.hactive = FDTPROP(PATHTIM, "hactive");
132*4882a593Smuzhiyun 	pnltmp.vactive = FDTPROP(PATHTIM, "vactive");
133*4882a593Smuzhiyun 	pnltmp.bpp = FDTPROP(PATHINF, "bpp");
134*4882a593Smuzhiyun 	pnltmp.hfp = FDTPROP(PATHTIM, "hfront-porch");
135*4882a593Smuzhiyun 	pnltmp.hbp = FDTPROP(PATHTIM, "hback-porch");
136*4882a593Smuzhiyun 	pnltmp.hsw = FDTPROP(PATHTIM, "hsync-len");
137*4882a593Smuzhiyun 	pnltmp.vfp = FDTPROP(PATHTIM, "vfront-porch");
138*4882a593Smuzhiyun 	pnltmp.vbp = FDTPROP(PATHTIM, "vback-porch");
139*4882a593Smuzhiyun 	pnltmp.vsw = FDTPROP(PATHTIM, "vsync-len");
140*4882a593Smuzhiyun 	pnltmp.pup_delay = FDTPROP(PATHTIM, "pupdelay");
141*4882a593Smuzhiyun 	pnltmp.pon_delay = FDTPROP(PATHTIM, "pondelay");
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	/* calc. proper clk-divisor */
144*4882a593Smuzhiyun 	dtbprop = FDTPROP(PATHTIM, "clock-frequency");
145*4882a593Smuzhiyun 	if (dtbprop != ~0UL)
146*4882a593Smuzhiyun 		pnltmp.pxl_clk_div = 192000000 / dtbprop;
147*4882a593Smuzhiyun 	else
148*4882a593Smuzhiyun 		pnltmp.pxl_clk_div = ~0UL;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	/* check polarity of control-signals */
151*4882a593Smuzhiyun 	dtbprop = FDTPROP(PATHTIM, "hsync-active");
152*4882a593Smuzhiyun 	if (dtbprop == 0)
153*4882a593Smuzhiyun 		pnltmp.pol |= HSYNC_INVERT;
154*4882a593Smuzhiyun 	dtbprop = FDTPROP(PATHTIM, "vsync-active");
155*4882a593Smuzhiyun 	if (dtbprop == 0)
156*4882a593Smuzhiyun 		pnltmp.pol |= VSYNC_INVERT;
157*4882a593Smuzhiyun 	dtbprop = FDTPROP(PATHINF, "sync-ctrl");
158*4882a593Smuzhiyun 	if (dtbprop == 1)
159*4882a593Smuzhiyun 		pnltmp.pol |= HSVS_CONTROL;
160*4882a593Smuzhiyun 	dtbprop = FDTPROP(PATHINF, "sync-edge");
161*4882a593Smuzhiyun 	if (dtbprop == 1)
162*4882a593Smuzhiyun 		pnltmp.pol |= HSVS_RISEFALL;
163*4882a593Smuzhiyun 	dtbprop = FDTPROP(PATHTIM, "pixelclk-active");
164*4882a593Smuzhiyun 	if (dtbprop == 0)
165*4882a593Smuzhiyun 		pnltmp.pol |= PXCLK_INVERT;
166*4882a593Smuzhiyun 	dtbprop = FDTPROP(PATHTIM, "de-active");
167*4882a593Smuzhiyun 	if (dtbprop == 0)
168*4882a593Smuzhiyun 		pnltmp.pol |= DE_INVERT;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	nodeoff = fdt_path_offset(gd->fdt_blob, "/factory-settings");
171*4882a593Smuzhiyun 	if (nodeoff >= 0) {
172*4882a593Smuzhiyun 		nodep = fdt_getprop(gd->fdt_blob, nodeoff, "rotation", NULL);
173*4882a593Smuzhiyun 		if (nodep != 0) {
174*4882a593Smuzhiyun 			if (strcmp(nodep, "cw") == 0)
175*4882a593Smuzhiyun 				panel_info.vl_rot = 1;
176*4882a593Smuzhiyun 			else if (strcmp(nodep, "ud") == 0)
177*4882a593Smuzhiyun 				panel_info.vl_rot = 2;
178*4882a593Smuzhiyun 			else if (strcmp(nodep, "ccw") == 0)
179*4882a593Smuzhiyun 				panel_info.vl_rot = 3;
180*4882a593Smuzhiyun 			else
181*4882a593Smuzhiyun 				panel_info.vl_rot = 0;
182*4882a593Smuzhiyun 		}
183*4882a593Smuzhiyun 	} else {
184*4882a593Smuzhiyun 		puts("no 'factory-settings / rotation' in dtb!\n");
185*4882a593Smuzhiyun 	}
186*4882a593Smuzhiyun 	snprintf(buf, sizeof(buf), "fbcon=rotate:%d", panel_info.vl_rot);
187*4882a593Smuzhiyun 	env_set("optargs_rot", buf);
188*4882a593Smuzhiyun #else
189*4882a593Smuzhiyun 	pnltmp.hactive = env_get_ulong("ds1_hactive", 10, ~0UL);
190*4882a593Smuzhiyun 	pnltmp.vactive = env_get_ulong("ds1_vactive", 10, ~0UL);
191*4882a593Smuzhiyun 	pnltmp.bpp = env_get_ulong("ds1_bpp", 10, ~0UL);
192*4882a593Smuzhiyun 	pnltmp.hfp = env_get_ulong("ds1_hfp", 10, ~0UL);
193*4882a593Smuzhiyun 	pnltmp.hbp = env_get_ulong("ds1_hbp", 10, ~0UL);
194*4882a593Smuzhiyun 	pnltmp.hsw = env_get_ulong("ds1_hsw", 10, ~0UL);
195*4882a593Smuzhiyun 	pnltmp.vfp = env_get_ulong("ds1_vfp", 10, ~0UL);
196*4882a593Smuzhiyun 	pnltmp.vbp = env_get_ulong("ds1_vbp", 10, ~0UL);
197*4882a593Smuzhiyun 	pnltmp.vsw = env_get_ulong("ds1_vsw", 10, ~0UL);
198*4882a593Smuzhiyun 	pnltmp.pxl_clk_div = env_get_ulong("ds1_pxlclkdiv", 10, ~0UL);
199*4882a593Smuzhiyun 	pnltmp.pol = env_get_ulong("ds1_pol", 16, ~0UL);
200*4882a593Smuzhiyun 	pnltmp.pup_delay = env_get_ulong("ds1_pupdelay", 10, ~0UL);
201*4882a593Smuzhiyun 	pnltmp.pon_delay = env_get_ulong("ds1_tondelay", 10, ~0UL);
202*4882a593Smuzhiyun 	panel_info.vl_rot = env_get_ulong("ds1_rotation", 10, 0);
203*4882a593Smuzhiyun #endif
204*4882a593Smuzhiyun 	if (
205*4882a593Smuzhiyun 	   ~0UL == (pnltmp.hactive) ||
206*4882a593Smuzhiyun 	   ~0UL == (pnltmp.vactive) ||
207*4882a593Smuzhiyun 	   ~0UL == (pnltmp.bpp) ||
208*4882a593Smuzhiyun 	   ~0UL == (pnltmp.hfp) ||
209*4882a593Smuzhiyun 	   ~0UL == (pnltmp.hbp) ||
210*4882a593Smuzhiyun 	   ~0UL == (pnltmp.hsw) ||
211*4882a593Smuzhiyun 	   ~0UL == (pnltmp.vfp) ||
212*4882a593Smuzhiyun 	   ~0UL == (pnltmp.vbp) ||
213*4882a593Smuzhiyun 	   ~0UL == (pnltmp.vsw) ||
214*4882a593Smuzhiyun 	   ~0UL == (pnltmp.pxl_clk_div) ||
215*4882a593Smuzhiyun 	   ~0UL == (pnltmp.pol) ||
216*4882a593Smuzhiyun 	   ~0UL == (pnltmp.pup_delay) ||
217*4882a593Smuzhiyun 	   ~0UL == (pnltmp.pon_delay)
218*4882a593Smuzhiyun 	   ) {
219*4882a593Smuzhiyun 		puts("lcd-settings in env/dtb incomplete!\n");
220*4882a593Smuzhiyun 		printf("display-timings:\n"
221*4882a593Smuzhiyun 			"================\n"
222*4882a593Smuzhiyun 			"hactive: %d\n"
223*4882a593Smuzhiyun 			"vactive: %d\n"
224*4882a593Smuzhiyun 			"bpp    : %d\n"
225*4882a593Smuzhiyun 			"hfp    : %d\n"
226*4882a593Smuzhiyun 			"hbp    : %d\n"
227*4882a593Smuzhiyun 			"hsw    : %d\n"
228*4882a593Smuzhiyun 			"vfp    : %d\n"
229*4882a593Smuzhiyun 			"vbp    : %d\n"
230*4882a593Smuzhiyun 			"vsw    : %d\n"
231*4882a593Smuzhiyun 			"pxlclk : %d\n"
232*4882a593Smuzhiyun 			"pol    : 0x%08x\n"
233*4882a593Smuzhiyun 			"pondly : %d\n",
234*4882a593Smuzhiyun 			pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
235*4882a593Smuzhiyun 			pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
236*4882a593Smuzhiyun 			pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
237*4882a593Smuzhiyun 			pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay);
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 		return -1;
240*4882a593Smuzhiyun 	}
241*4882a593Smuzhiyun 	debug("lcd-settings in env complete, taking over.\n");
242*4882a593Smuzhiyun 	memcpy((void *)panel,
243*4882a593Smuzhiyun 	       (void *)&pnltmp,
244*4882a593Smuzhiyun 	       sizeof(struct am335x_lcdpanel));
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun #ifdef CONFIG_USE_FDT
load_devicetree(void)250*4882a593Smuzhiyun static int load_devicetree(void)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	int rc;
253*4882a593Smuzhiyun 	loff_t dtbsize;
254*4882a593Smuzhiyun 	u32 dtbaddr = env_get_ulong("dtbaddr", 16, 0UL);
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	if (dtbaddr == 0) {
257*4882a593Smuzhiyun 		printf("%s: don't have a valid <dtbaddr> in env!\n", __func__);
258*4882a593Smuzhiyun 		return -1;
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun #ifdef CONFIG_NAND
261*4882a593Smuzhiyun 	dtbsize = 0x20000;
262*4882a593Smuzhiyun 	rc = nand_read_skip_bad(get_nand_dev_by_index(0), 0x40000,
263*4882a593Smuzhiyun 				(size_t *)&dtbsize,
264*4882a593Smuzhiyun 				NULL, 0x20000, (u_char *)dtbaddr);
265*4882a593Smuzhiyun #else
266*4882a593Smuzhiyun 	char *dtbname = env_get("dtb");
267*4882a593Smuzhiyun 	char *dtbdev = env_get("dtbdev");
268*4882a593Smuzhiyun 	char *dtbpart = env_get("dtbpart");
269*4882a593Smuzhiyun 	if (!dtbdev || !dtbpart || !dtbname) {
270*4882a593Smuzhiyun 		printf("%s: <dtbdev>/<dtbpart>/<dtb> missing.\n", __func__);
271*4882a593Smuzhiyun 		return -1;
272*4882a593Smuzhiyun 	}
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if (fs_set_blk_dev(dtbdev, dtbpart, FS_TYPE_EXT)) {
275*4882a593Smuzhiyun 		puts("load_devicetree: set_blk_dev failed.\n");
276*4882a593Smuzhiyun 		return -1;
277*4882a593Smuzhiyun 	}
278*4882a593Smuzhiyun 	rc = fs_read(dtbname, (u32)dtbaddr, 0, 0, &dtbsize);
279*4882a593Smuzhiyun #endif
280*4882a593Smuzhiyun 	if (rc == 0) {
281*4882a593Smuzhiyun 		gd->fdt_blob = (void *)dtbaddr;
282*4882a593Smuzhiyun 		gd->fdt_size = dtbsize;
283*4882a593Smuzhiyun 		debug("loaded %d bytes of dtb onto 0x%08x\n",
284*4882a593Smuzhiyun 		      (u32)dtbsize, (u32)gd->fdt_blob);
285*4882a593Smuzhiyun 		return dtbsize;
286*4882a593Smuzhiyun 	}
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	printf("%s: load dtb failed!\n", __func__);
289*4882a593Smuzhiyun 	return -1;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
dtbmacaddr(u32 ifno)292*4882a593Smuzhiyun static const char *dtbmacaddr(u32 ifno)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	int node, len;
295*4882a593Smuzhiyun 	char enet[16];
296*4882a593Smuzhiyun 	const char *mac;
297*4882a593Smuzhiyun 	const char *path;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	if (gd->fdt_blob == NULL) {
300*4882a593Smuzhiyun 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
301*4882a593Smuzhiyun 		return NULL;
302*4882a593Smuzhiyun 	}
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	node = fdt_path_offset(gd->fdt_blob, "/aliases");
305*4882a593Smuzhiyun 	if (node < 0)
306*4882a593Smuzhiyun 		return NULL;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	sprintf(enet, "ethernet%d", ifno);
309*4882a593Smuzhiyun 	path = fdt_getprop(gd->fdt_blob, node, enet, NULL);
310*4882a593Smuzhiyun 	if (!path) {
311*4882a593Smuzhiyun 		printf("no alias for %s\n", enet);
312*4882a593Smuzhiyun 		return NULL;
313*4882a593Smuzhiyun 	}
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	node = fdt_path_offset(gd->fdt_blob, path);
316*4882a593Smuzhiyun 	mac = fdt_getprop(gd->fdt_blob, node, "mac-address", &len);
317*4882a593Smuzhiyun 	if (mac && is_valid_ethaddr((u8 *)mac))
318*4882a593Smuzhiyun 		return mac;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	return NULL;
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun 
br_summaryscreen_printdtb(char * prefix,char * name,char * suffix)323*4882a593Smuzhiyun static void br_summaryscreen_printdtb(char *prefix,
324*4882a593Smuzhiyun 				       char *name,
325*4882a593Smuzhiyun 				       char *suffix)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun 	char buf[32] = { 0 };
328*4882a593Smuzhiyun 	const char *nodep = buf;
329*4882a593Smuzhiyun 	char *mac = 0;
330*4882a593Smuzhiyun 	int nodeoffset;
331*4882a593Smuzhiyun 	int len;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	if (gd->fdt_blob == NULL) {
334*4882a593Smuzhiyun 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
335*4882a593Smuzhiyun 		return;
336*4882a593Smuzhiyun 	}
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	if (strcmp(name, "brmac1") == 0) {
339*4882a593Smuzhiyun 		mac = (char *)dtbmacaddr(0);
340*4882a593Smuzhiyun 		if (mac)
341*4882a593Smuzhiyun 			sprintf(buf, "%pM", mac);
342*4882a593Smuzhiyun 	} else if (strcmp(name, "brmac2") == 0) {
343*4882a593Smuzhiyun 		mac =  (char *)dtbmacaddr(1);
344*4882a593Smuzhiyun 		if (mac)
345*4882a593Smuzhiyun 			sprintf(buf, "%pM", mac);
346*4882a593Smuzhiyun 	} else {
347*4882a593Smuzhiyun 		nodeoffset = fdt_path_offset(gd->fdt_blob,
348*4882a593Smuzhiyun 					     "/factory-settings");
349*4882a593Smuzhiyun 		if (nodeoffset < 0) {
350*4882a593Smuzhiyun 			puts("no 'factory-settings' in dtb!\n");
351*4882a593Smuzhiyun 			return;
352*4882a593Smuzhiyun 		}
353*4882a593Smuzhiyun 		nodep = fdt_getprop(gd->fdt_blob, nodeoffset, name, &len);
354*4882a593Smuzhiyun 	}
355*4882a593Smuzhiyun 	if (nodep && strlen(nodep) > 1)
356*4882a593Smuzhiyun 		lcd_printf("%s %s %s", prefix, nodep, suffix);
357*4882a593Smuzhiyun 	else
358*4882a593Smuzhiyun 		lcd_printf("\n");
359*4882a593Smuzhiyun }
ft_board_setup(void * blob,bd_t * bd)360*4882a593Smuzhiyun int ft_board_setup(void *blob, bd_t *bd)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun 	int nodeoffset;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	nodeoffset = fdt_path_offset(blob, "/factory-settings");
365*4882a593Smuzhiyun 	if (nodeoffset < 0) {
366*4882a593Smuzhiyun 		puts("set bootloader version 'factory-settings' not in dtb!\n");
367*4882a593Smuzhiyun 		return -1;
368*4882a593Smuzhiyun 	}
369*4882a593Smuzhiyun 	if (fdt_setprop(blob, nodeoffset, "bl-version",
370*4882a593Smuzhiyun 			PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
371*4882a593Smuzhiyun 		puts("set bootloader version 'bl-version' prop. not in dtb!\n");
372*4882a593Smuzhiyun 		return -1;
373*4882a593Smuzhiyun 	}
374*4882a593Smuzhiyun 	/*
375*4882a593Smuzhiyun 	 * if no simplefb is requested through environment, we don't set up
376*4882a593Smuzhiyun 	 * one, instead we turn off backlight.
377*4882a593Smuzhiyun 	 */
378*4882a593Smuzhiyun 	if (env_get_ulong("simplefb", 10, 0) == 0) {
379*4882a593Smuzhiyun 		lcdbacklight(0);
380*4882a593Smuzhiyun 		return 0;
381*4882a593Smuzhiyun 	}
382*4882a593Smuzhiyun 	/* Setup simplefb devicetree node, also adapt memory-node,
383*4882a593Smuzhiyun 	 * upper limit for kernel e.g. linux is memtop-framebuffer alligned
384*4882a593Smuzhiyun 	 * to a full megabyte.
385*4882a593Smuzhiyun 	 */
386*4882a593Smuzhiyun 	u64 start = gd->bd->bi_dram[0].start;
387*4882a593Smuzhiyun 	u64 size = (gd->fb_base - start) & ~0xFFFFF;
388*4882a593Smuzhiyun 	int rc = fdt_fixup_memory_banks(blob, &start, &size, 1);
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	if (rc) {
391*4882a593Smuzhiyun 		puts("cannot setup simplefb: Error reserving memory!\n");
392*4882a593Smuzhiyun 		return rc;
393*4882a593Smuzhiyun 	}
394*4882a593Smuzhiyun 	rc = lcd_dt_simplefb_enable_existing_node(blob);
395*4882a593Smuzhiyun 	if (rc) {
396*4882a593Smuzhiyun 		puts("cannot setup simplefb: error enabling simplefb node!\n");
397*4882a593Smuzhiyun 		return rc;
398*4882a593Smuzhiyun 	}
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 	return 0;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun #else
403*4882a593Smuzhiyun 
br_summaryscreen_printenv(char * prefix,char * name,char * altname,char * suffix)404*4882a593Smuzhiyun static void br_summaryscreen_printenv(char *prefix,
405*4882a593Smuzhiyun 				       char *name, char *altname,
406*4882a593Smuzhiyun 				       char *suffix)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun 	char *envval = env_get(name);
409*4882a593Smuzhiyun 	if (0 != envval) {
410*4882a593Smuzhiyun 		lcd_printf("%s %s %s", prefix, envval, suffix);
411*4882a593Smuzhiyun 	} else if (0 != altname) {
412*4882a593Smuzhiyun 		envval = env_get(altname);
413*4882a593Smuzhiyun 		if (0 != envval)
414*4882a593Smuzhiyun 			lcd_printf("%s %s %s", prefix, envval, suffix);
415*4882a593Smuzhiyun 	} else {
416*4882a593Smuzhiyun 		lcd_printf("\n");
417*4882a593Smuzhiyun 	}
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun #endif
br_summaryscreen(void)420*4882a593Smuzhiyun void br_summaryscreen(void)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun #ifdef CONFIG_USE_FDT
423*4882a593Smuzhiyun 	br_summaryscreen_printdtb(" - B&R -", "order-no", "-\n");
424*4882a593Smuzhiyun 	br_summaryscreen_printdtb(" Serial/Rev :", "serial-no", " /");
425*4882a593Smuzhiyun 	br_summaryscreen_printdtb(" ", "hw-revision", "\n");
426*4882a593Smuzhiyun 	br_summaryscreen_printdtb(" MAC (IF1)  :", "brmac1", "\n");
427*4882a593Smuzhiyun 	br_summaryscreen_printdtb(" MAC (IF2)  :", "brmac2", "\n");
428*4882a593Smuzhiyun 	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
429*4882a593Smuzhiyun 	lcd_puts("\n");
430*4882a593Smuzhiyun #else
431*4882a593Smuzhiyun 	br_summaryscreen_printenv(" - B&R -", "br_orderno", 0, "-\n");
432*4882a593Smuzhiyun 	br_summaryscreen_printenv(" Serial/Rev :", "br_serial", 0, "\n");
433*4882a593Smuzhiyun 	br_summaryscreen_printenv(" MAC (IF1)  :", "br_mac1", "ethaddr", "\n");
434*4882a593Smuzhiyun 	br_summaryscreen_printenv(" MAC (IF2)  :", "br_mac2", 0, "\n");
435*4882a593Smuzhiyun 	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
436*4882a593Smuzhiyun 	lcd_puts("\n");
437*4882a593Smuzhiyun #endif
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun 
lcdpower(int on)440*4882a593Smuzhiyun void lcdpower(int on)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun 	u32 pin, swval, i;
443*4882a593Smuzhiyun #ifdef CONFIG_USE_FDT
444*4882a593Smuzhiyun 	if (gd->fdt_blob == NULL) {
445*4882a593Smuzhiyun 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
446*4882a593Smuzhiyun 		return;
447*4882a593Smuzhiyun 	}
448*4882a593Smuzhiyun 	pin = FDTPROP(PATHINF, "pwrpin");
449*4882a593Smuzhiyun #else
450*4882a593Smuzhiyun 	pin = env_get_ulong("ds1_pwr", 16, ~0UL);
451*4882a593Smuzhiyun #endif
452*4882a593Smuzhiyun 	if (pin == ~0UL) {
453*4882a593Smuzhiyun 		puts("no pwrpin in dtb/env, cannot powerup display!\n");
454*4882a593Smuzhiyun 		return;
455*4882a593Smuzhiyun 	}
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	for (i = 0; i < 3; i++) {
458*4882a593Smuzhiyun 		if (pin != 0) {
459*4882a593Smuzhiyun 			swval = pin & 0x80 ? 0 : 1;
460*4882a593Smuzhiyun 			if (on)
461*4882a593Smuzhiyun 				gpio_direction_output(pin & 0x7F, swval);
462*4882a593Smuzhiyun 			else
463*4882a593Smuzhiyun 				gpio_direction_output(pin & 0x7F, !swval);
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 			debug("switched pin %d to %d\n", pin & 0x7F, swval);
466*4882a593Smuzhiyun 		}
467*4882a593Smuzhiyun 		pin >>= 8;
468*4882a593Smuzhiyun 	}
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun vidinfo_t	panel_info = {
472*4882a593Smuzhiyun 		.vl_col = 1366,	/*
473*4882a593Smuzhiyun 				 * give full resolution for allocating enough
474*4882a593Smuzhiyun 				 * memory
475*4882a593Smuzhiyun 				 */
476*4882a593Smuzhiyun 		.vl_row = 768,
477*4882a593Smuzhiyun 		.vl_bpix = 5,
478*4882a593Smuzhiyun 		.priv = 0
479*4882a593Smuzhiyun };
480*4882a593Smuzhiyun 
lcd_ctrl_init(void * lcdbase)481*4882a593Smuzhiyun void lcd_ctrl_init(void *lcdbase)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun 	struct am335x_lcdpanel lcd_panel;
484*4882a593Smuzhiyun #ifdef CONFIG_USE_FDT
485*4882a593Smuzhiyun 	/* TODO: is there a better place to load the dtb ? */
486*4882a593Smuzhiyun 	load_devicetree();
487*4882a593Smuzhiyun #endif
488*4882a593Smuzhiyun 	memset(&lcd_panel, 0, sizeof(struct am335x_lcdpanel));
489*4882a593Smuzhiyun 	if (load_lcdtiming(&lcd_panel) != 0)
490*4882a593Smuzhiyun 		return;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	lcd_panel.panel_power_ctrl = &lcdpower;
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	if (0 != am335xfb_init(&lcd_panel))
495*4882a593Smuzhiyun 		printf("ERROR: failed to initialize video!");
496*4882a593Smuzhiyun 	/*
497*4882a593Smuzhiyun 	 * modifiy panel info to 'real' resolution, to operate correct with
498*4882a593Smuzhiyun 	 * lcd-framework.
499*4882a593Smuzhiyun 	 */
500*4882a593Smuzhiyun 	panel_info.vl_col = lcd_panel.hactive;
501*4882a593Smuzhiyun 	panel_info.vl_row = lcd_panel.vactive;
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	lcd_set_flush_dcache(1);
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun 
lcd_enable(void)506*4882a593Smuzhiyun void lcd_enable(void)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun 	br_summaryscreen();
509*4882a593Smuzhiyun 	lcdbacklight(1);
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun #elif CONFIG_SPL_BUILD
512*4882a593Smuzhiyun #else
513*4882a593Smuzhiyun #error "LCD-support with a suitable FB-Driver is mandatory !"
514*4882a593Smuzhiyun #endif /* CONFIG_LCD */
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
pmicsetup(u32 mpupll)517*4882a593Smuzhiyun void pmicsetup(u32 mpupll)
518*4882a593Smuzhiyun {
519*4882a593Smuzhiyun 	int mpu_vdd;
520*4882a593Smuzhiyun 	int usb_cur_lim;
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun 	if (i2c_probe(TPS65217_CHIP_PM)) {
523*4882a593Smuzhiyun 		puts("PMIC (0x24) not found! skip further initalization.\n");
524*4882a593Smuzhiyun 		return;
525*4882a593Smuzhiyun 	}
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	/* Get the frequency which is defined by device fuses */
528*4882a593Smuzhiyun 	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
529*4882a593Smuzhiyun 	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	if (0 != mpupll) {
532*4882a593Smuzhiyun 		dpll_mpu_opp100.m = MPUPLL_M_1000;
533*4882a593Smuzhiyun 		printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
534*4882a593Smuzhiyun 	} else {
535*4882a593Smuzhiyun 		puts("ok.\n");
536*4882a593Smuzhiyun 	}
537*4882a593Smuzhiyun 	/*
538*4882a593Smuzhiyun 	 * Increase USB current limit to 1300mA or 1800mA and set
539*4882a593Smuzhiyun 	 * the MPU voltage controller as needed.
540*4882a593Smuzhiyun 	 */
541*4882a593Smuzhiyun 	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
542*4882a593Smuzhiyun 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
543*4882a593Smuzhiyun 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
544*4882a593Smuzhiyun 	} else {
545*4882a593Smuzhiyun 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
546*4882a593Smuzhiyun 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
547*4882a593Smuzhiyun 	}
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
550*4882a593Smuzhiyun 			       usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
551*4882a593Smuzhiyun 		puts("tps65217_reg_write failure\n");
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	/* Set DCDC3 (CORE) voltage to 1.125V */
554*4882a593Smuzhiyun 	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
555*4882a593Smuzhiyun 				    TPS65217_DCDC_VOLT_SEL_1125MV)) {
556*4882a593Smuzhiyun 		puts("tps65217_voltage_update failure\n");
557*4882a593Smuzhiyun 		return;
558*4882a593Smuzhiyun 	}
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	/* Set CORE Frequencies to OPP100 */
561*4882a593Smuzhiyun 	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	/* Set DCDC2 (MPU) voltage */
564*4882a593Smuzhiyun 	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
565*4882a593Smuzhiyun 		puts("tps65217_voltage_update failure\n");
566*4882a593Smuzhiyun 		return;
567*4882a593Smuzhiyun 	}
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	/* Set LDO3 to 1.8V */
570*4882a593Smuzhiyun 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
571*4882a593Smuzhiyun 			       TPS65217_DEFLS1,
572*4882a593Smuzhiyun 			       TPS65217_LDO_VOLTAGE_OUT_1_8,
573*4882a593Smuzhiyun 			       TPS65217_LDO_MASK))
574*4882a593Smuzhiyun 		puts("tps65217_reg_write failure\n");
575*4882a593Smuzhiyun 	/* Set LDO4 to 3.3V */
576*4882a593Smuzhiyun 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
577*4882a593Smuzhiyun 			       TPS65217_DEFLS2,
578*4882a593Smuzhiyun 			       TPS65217_LDO_VOLTAGE_OUT_3_3,
579*4882a593Smuzhiyun 			       TPS65217_LDO_MASK))
580*4882a593Smuzhiyun 		puts("tps65217_reg_write failure\n");
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	/* Set MPU Frequency to what we detected now that voltages are set */
583*4882a593Smuzhiyun 	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
584*4882a593Smuzhiyun 	/* Set PWR_EN bit in Status Register */
585*4882a593Smuzhiyun 	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
586*4882a593Smuzhiyun 			   TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun 
set_uart_mux_conf(void)589*4882a593Smuzhiyun void set_uart_mux_conf(void)
590*4882a593Smuzhiyun {
591*4882a593Smuzhiyun 	enable_uart0_pin_mux();
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun 
set_mux_conf_regs(void)594*4882a593Smuzhiyun void set_mux_conf_regs(void)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun 	enable_board_pin_mux();
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun #endif /* CONFIG_SPL_BUILD */
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
602*4882a593Smuzhiyun 	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
cpsw_control(int enabled)603*4882a593Smuzhiyun static void cpsw_control(int enabled)
604*4882a593Smuzhiyun {
605*4882a593Smuzhiyun 	/* VTP can be added here */
606*4882a593Smuzhiyun 	return;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun /* describing port offsets of TI's CPSW block */
610*4882a593Smuzhiyun static struct cpsw_slave_data cpsw_slaves[] = {
611*4882a593Smuzhiyun 	{
612*4882a593Smuzhiyun 		.slave_reg_ofs	= 0x208,
613*4882a593Smuzhiyun 		.sliver_reg_ofs	= 0xd80,
614*4882a593Smuzhiyun 		.phy_addr	= 1,
615*4882a593Smuzhiyun 	},
616*4882a593Smuzhiyun 	{
617*4882a593Smuzhiyun 		.slave_reg_ofs	= 0x308,
618*4882a593Smuzhiyun 		.sliver_reg_ofs	= 0xdc0,
619*4882a593Smuzhiyun 		.phy_addr	= 2,
620*4882a593Smuzhiyun 	},
621*4882a593Smuzhiyun };
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun static struct cpsw_platform_data cpsw_data = {
624*4882a593Smuzhiyun 	.mdio_base		= CPSW_MDIO_BASE,
625*4882a593Smuzhiyun 	.cpsw_base		= CPSW_BASE,
626*4882a593Smuzhiyun 	.mdio_div		= 0xff,
627*4882a593Smuzhiyun 	.channels		= 8,
628*4882a593Smuzhiyun 	.cpdma_reg_ofs		= 0x800,
629*4882a593Smuzhiyun 	.slaves			= 1,
630*4882a593Smuzhiyun 	.slave_data		= cpsw_slaves,
631*4882a593Smuzhiyun 	.ale_reg_ofs		= 0xd00,
632*4882a593Smuzhiyun 	.ale_entries		= 1024,
633*4882a593Smuzhiyun 	.host_port_reg_ofs	= 0x108,
634*4882a593Smuzhiyun 	.hw_stats_reg_ofs	= 0x900,
635*4882a593Smuzhiyun 	.bd_ram_ofs		= 0x2000,
636*4882a593Smuzhiyun 	.mac_control		= (1 << 5),
637*4882a593Smuzhiyun 	.control		= cpsw_control,
638*4882a593Smuzhiyun 	.host_port_num		= 0,
639*4882a593Smuzhiyun 	.version		= CPSW_CTRL_VERSION_2,
640*4882a593Smuzhiyun };
641*4882a593Smuzhiyun #endif /* CONFIG_DRIVER_TI_CPSW, ... */
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun #if defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)
board_eth_init(bd_t * bis)644*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
645*4882a593Smuzhiyun {
646*4882a593Smuzhiyun 	int rv = 0;
647*4882a593Smuzhiyun 	char mac_addr[6];
648*4882a593Smuzhiyun 	const char *mac = 0;
649*4882a593Smuzhiyun 	uint32_t mac_hi, mac_lo;
650*4882a593Smuzhiyun 	/* try reading mac address from efuse */
651*4882a593Smuzhiyun 	mac_lo = readl(&cdev->macid0l);
652*4882a593Smuzhiyun 	mac_hi = readl(&cdev->macid0h);
653*4882a593Smuzhiyun 	mac_addr[0] = mac_hi & 0xFF;
654*4882a593Smuzhiyun 	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
655*4882a593Smuzhiyun 	mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
656*4882a593Smuzhiyun 	mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
657*4882a593Smuzhiyun 	mac_addr[4] = mac_lo & 0xFF;
658*4882a593Smuzhiyun 	mac_addr[5] = (mac_lo & 0xFF00) >> 8;
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	if (!env_get("ethaddr")) {
661*4882a593Smuzhiyun 		#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_FDT)
662*4882a593Smuzhiyun 		printf("<ethaddr> not set. trying DTB ... ");
663*4882a593Smuzhiyun 		mac = dtbmacaddr(0);
664*4882a593Smuzhiyun 		#endif
665*4882a593Smuzhiyun 		if (!mac) {
666*4882a593Smuzhiyun 			printf("<ethaddr> not set. validating E-fuse MAC ... ");
667*4882a593Smuzhiyun 			if (is_valid_ethaddr((const u8 *)mac_addr))
668*4882a593Smuzhiyun 				mac = (const char *)mac_addr;
669*4882a593Smuzhiyun 		}
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 		if (mac) {
672*4882a593Smuzhiyun 			printf("using: %pM on ", mac);
673*4882a593Smuzhiyun 			eth_env_set_enetaddr("ethaddr", (const u8 *)mac);
674*4882a593Smuzhiyun 		}
675*4882a593Smuzhiyun 	}
676*4882a593Smuzhiyun 	writel(MII_MODE_ENABLE, &cdev->miisel);
677*4882a593Smuzhiyun 	cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
678*4882a593Smuzhiyun 	cpsw_slaves[1].phy_if =	PHY_INTERFACE_MODE_MII;
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun 	rv = cpsw_register(&cpsw_data);
681*4882a593Smuzhiyun 	if (rv < 0) {
682*4882a593Smuzhiyun 		printf("Error %d registering CPSW switch\n", rv);
683*4882a593Smuzhiyun 		return 0;
684*4882a593Smuzhiyun 	}
685*4882a593Smuzhiyun 	return rv;
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun #endif /* defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD) */
688*4882a593Smuzhiyun #if defined(CONFIG_MMC)
board_mmc_init(bd_t * bis)689*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
690*4882a593Smuzhiyun {
691*4882a593Smuzhiyun 	int rc = 0;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	rc |= omap_mmc_init(0, 0, 0, -1, -1);
694*4882a593Smuzhiyun 	rc |= omap_mmc_init(1, 0, 0, -1, -1);
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun 	return rc;
697*4882a593Smuzhiyun }
698*4882a593Smuzhiyun #endif
overwrite_console(void)699*4882a593Smuzhiyun int overwrite_console(void)
700*4882a593Smuzhiyun {
701*4882a593Smuzhiyun 	return 1;
702*4882a593Smuzhiyun }
703