1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2013-2015 Arcturus Networks, Inc.
3*4882a593Smuzhiyun * http://www.arcturusnetworks.com/products/ucp1020/
4*4882a593Smuzhiyun * based on board/freescale/p1_p2_rdb_pc/spl_minimal.c
5*4882a593Smuzhiyun * original copyright follows:
6*4882a593Smuzhiyun * Copyright 2011 Freescale Semiconductor, Inc.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <ns16550.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun #include <nand.h>
15*4882a593Smuzhiyun #include <linux/compiler.h>
16*4882a593Smuzhiyun #include <asm/fsl_law.h>
17*4882a593Smuzhiyun #include <fsl_ddr_sdram.h>
18*4882a593Smuzhiyun #include <asm/global_data.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
21*4882a593Smuzhiyun
board_init_f(ulong bootflag)22*4882a593Smuzhiyun void board_init_f(ulong bootflag)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun u32 plat_ratio;
25*4882a593Smuzhiyun ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM)
28*4882a593Smuzhiyun set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
29*4882a593Smuzhiyun set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM);
30*4882a593Smuzhiyun #endif
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* initialize selected port with appropriate baud rate */
33*4882a593Smuzhiyun plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
34*4882a593Smuzhiyun plat_ratio >>= 1;
35*4882a593Smuzhiyun gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
38*4882a593Smuzhiyun gd->bus_clk / 16 / CONFIG_BAUDRATE);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun puts("\nNAND boot... ");
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* copy code to RAM and jump to it - this should not return */
43*4882a593Smuzhiyun /* NOTE - code has to be copied out of NAND buffer before
44*4882a593Smuzhiyun * other blocks can be read.
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
board_init_r(gd_t * gd,ulong dest_addr)49*4882a593Smuzhiyun void board_init_r(gd_t *gd, ulong dest_addr)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun puts("\nSecond program loader running in sram...");
52*4882a593Smuzhiyun nand_boot();
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
putc(char c)55*4882a593Smuzhiyun void putc(char c)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun if (c == '\n')
58*4882a593Smuzhiyun NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r');
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
puts(const char * str)63*4882a593Smuzhiyun void puts(const char *str)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun while (*str)
66*4882a593Smuzhiyun putc(*str++);
67*4882a593Smuzhiyun }
68