1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2011 Andes Technology Corporation
3*4882a593Smuzhiyun * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
4*4882a593Smuzhiyun * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
11*4882a593Smuzhiyun #include <netdev.h>
12*4882a593Smuzhiyun #endif
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <asm/io.h>
15*4882a593Smuzhiyun #include <asm/mach-types.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <faraday/ftsdc010.h>
18*4882a593Smuzhiyun #include <faraday/ftsmc020.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * Miscellaneous platform dependent initializations
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
board_init(void)26*4882a593Smuzhiyun int board_init(void)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * refer to BOOT_PARAMETER_PA_BASE within
30*4882a593Smuzhiyun * "linux/arch/nds32/include/asm/misc_spec.h"
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun printf("Board: %s\n" , CONFIG_SYS_BOARD);
33*4882a593Smuzhiyun gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
34*4882a593Smuzhiyun gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun return 0;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
dram_init(void)39*4882a593Smuzhiyun int dram_init(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun unsigned long sdram_base = PHYS_SDRAM_0;
42*4882a593Smuzhiyun unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
43*4882a593Smuzhiyun unsigned long actual_size;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun actual_size = get_ram_size((void *)sdram_base, expected_size);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun gd->ram_size = actual_size;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun if (expected_size != actual_size) {
50*4882a593Smuzhiyun printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
51*4882a593Smuzhiyun actual_size >> 20, expected_size >> 20);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun return 0;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
dram_init_banksize(void)57*4882a593Smuzhiyun int dram_init_banksize(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
60*4882a593Smuzhiyun gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
61*4882a593Smuzhiyun gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
62*4882a593Smuzhiyun gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
board_eth_init(bd_t * bd)68*4882a593Smuzhiyun int board_eth_init(bd_t *bd)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun return ftmac100_initialize(bd);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun #endif
73*4882a593Smuzhiyun
board_flash_get_legacy(ulong base,int banknum,flash_info_t * info)74*4882a593Smuzhiyun ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun if (banknum == 0) { /* non-CFI boot flash */
77*4882a593Smuzhiyun info->portwidth = FLASH_CFI_8BIT;
78*4882a593Smuzhiyun info->chipwidth = FLASH_CFI_BY8;
79*4882a593Smuzhiyun info->interface = FLASH_CFI_X8;
80*4882a593Smuzhiyun return 1;
81*4882a593Smuzhiyun } else {
82*4882a593Smuzhiyun return 0;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
board_mmc_init(bd_t * bis)86*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun #ifdef CONFIG_FTSDC010
89*4882a593Smuzhiyun ftsdc010_mmc_init(0);
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun return 0;
92*4882a593Smuzhiyun }
93