1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2007, Tensilica Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun ******************************************************************** 7*4882a593Smuzhiyun * NOTE: This header file defines an interface to U-Boot. Including 8*4882a593Smuzhiyun * this (unmodified) header file in another file is considered normal 9*4882a593Smuzhiyun * use of U-Boot, and does *not* fall under the heading of "derived 10*4882a593Smuzhiyun * work". 11*4882a593Smuzhiyun ******************************************************************** 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef _XTENSA_U_BOOT_H 15*4882a593Smuzhiyun #define _XTENSA_U_BOOT_H 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifdef CONFIG_SYS_GENERIC_BOARD 18*4882a593Smuzhiyun /* Use the generic board which requires a unified bd_info */ 19*4882a593Smuzhiyun #include <asm-generic/u-boot.h> 20*4882a593Smuzhiyun #else 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 23*4882a593Smuzhiyun typedef struct bd_info { 24*4882a593Smuzhiyun int bi_baudrate; /* serial console baudrate */ 25*4882a593Smuzhiyun unsigned long bi_ip_addr; /* IP Address */ 26*4882a593Smuzhiyun unsigned char bi_enetaddr[6]; /* Ethernet adress */ 27*4882a593Smuzhiyun unsigned long bi_boot_params; /* where this board expects params */ 28*4882a593Smuzhiyun unsigned long bi_memstart; /* start of DRAM memory VA */ 29*4882a593Smuzhiyun unsigned long bi_memsize; /* size of DRAM memory in bytes */ 30*4882a593Smuzhiyun unsigned long bi_flashstart; /* start of FLASH memory */ 31*4882a593Smuzhiyun unsigned long bi_flashsize; /* size of FLASH memory */ 32*4882a593Smuzhiyun unsigned long bi_flashoffset; /* offset to skip UBoot image */ 33*4882a593Smuzhiyun } bd_t; 34*4882a593Smuzhiyun #endif /* __ ASSEMBLY__ */ 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #endif /* CONFIG_SYS_GENERIC_BOARD */ 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* For image.h:image_check_target_arch() */ 39*4882a593Smuzhiyun #define IH_ARCH_DEFAULT IH_ARCH_XTENSA 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #endif /* _XTENSA_U_BOOT_H */ 42