1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * IO header file
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2001-2007 Tensilica Inc.
5*4882a593Smuzhiyun * Based on the Linux/Xtensa version of this header.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #ifndef _XTENSA_IO_H
11*4882a593Smuzhiyun #define _XTENSA_IO_H
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/types.h>
14*4882a593Smuzhiyun #include <asm/byteorder.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun * swap functions to change byte order from little-endian to big-endian and
18*4882a593Smuzhiyun * vice versa.
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
_swapw(unsigned short v)21*4882a593Smuzhiyun static inline unsigned short _swapw(unsigned short v)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun return (v << 8) | (v >> 8);
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun
_swapl(unsigned int v)26*4882a593Smuzhiyun static inline unsigned int _swapl(unsigned int v)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun return (v << 24) | ((v & 0xff00) << 8) |
29*4882a593Smuzhiyun ((v >> 8) & 0xff00) | (v >> 24);
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /*
33*4882a593Smuzhiyun * Generic I/O
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define readb(addr) \
37*4882a593Smuzhiyun ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; })
38*4882a593Smuzhiyun #define readw(addr) \
39*4882a593Smuzhiyun ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; })
40*4882a593Smuzhiyun #define readl(addr) \
41*4882a593Smuzhiyun ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; })
42*4882a593Smuzhiyun #define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b))
43*4882a593Smuzhiyun #define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b))
44*4882a593Smuzhiyun #define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b))
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define __raw_readb readb
47*4882a593Smuzhiyun #define __raw_readw readw
48*4882a593Smuzhiyun #define __raw_readl readl
49*4882a593Smuzhiyun #define __raw_writeb writeb
50*4882a593Smuzhiyun #define __raw_writew writew
51*4882a593Smuzhiyun #define __raw_writel writel
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* These are the definitions for the x86 IO instructions
54*4882a593Smuzhiyun * inb/inw/inl/outb/outw/outl, the "string" versions
55*4882a593Smuzhiyun * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
56*4882a593Smuzhiyun * inb_p/inw_p/...
57*4882a593Smuzhiyun * The macros don't do byte-swapping.
58*4882a593Smuzhiyun */
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define inb(port) readb((u8 *)((port)))
61*4882a593Smuzhiyun #define outb(val, port) writeb((val), (u8 *)((unsigned long)(port)))
62*4882a593Smuzhiyun #define inw(port) readw((u16 *)((port)))
63*4882a593Smuzhiyun #define outw(val, port) writew((val), (u16 *)((unsigned long)(port)))
64*4882a593Smuzhiyun #define inl(port) readl((u32 *)((port)))
65*4882a593Smuzhiyun #define outl(val, port) writel((val), (u32 *)((unsigned long)(port)))
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define inb_p(port) inb((port))
68*4882a593Smuzhiyun #define outb_p(val, port) outb((val), (port))
69*4882a593Smuzhiyun #define inw_p(port) inw((port))
70*4882a593Smuzhiyun #define outw_p(val, port) outw((val), (port))
71*4882a593Smuzhiyun #define inl_p(port) inl((port))
72*4882a593Smuzhiyun #define outl_p(val, port) outl((val), (port))
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun void insb(unsigned long port, void *dst, unsigned long count);
75*4882a593Smuzhiyun void insw(unsigned long port, void *dst, unsigned long count);
76*4882a593Smuzhiyun void insl(unsigned long port, void *dst, unsigned long count);
77*4882a593Smuzhiyun void outsb(unsigned long port, const void *src, unsigned long count);
78*4882a593Smuzhiyun void outsw(unsigned long port, const void *src, unsigned long count);
79*4882a593Smuzhiyun void outsl(unsigned long port, const void *src, unsigned long count);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #define IO_SPACE_LIMIT ~0
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #define memset_io(a, b, c) memset((void *)(a), (b), (c))
84*4882a593Smuzhiyun #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
85*4882a593Smuzhiyun #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* At this point the Xtensa doesn't provide byte swap instructions */
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun #ifdef __XTENSA_EB__
90*4882a593Smuzhiyun # define in_8(addr) (*(u8 *)(addr))
91*4882a593Smuzhiyun # define in_le16(addr) _swapw(*(u16 *)(addr))
92*4882a593Smuzhiyun # define in_le32(addr) _swapl(*(u32 *)(addr))
93*4882a593Smuzhiyun # define out_8(b, addr) *(u8 *)(addr) = (b)
94*4882a593Smuzhiyun # define out_le16(b, addr) *(u16 *)(addr) = _swapw(b)
95*4882a593Smuzhiyun # define out_le32(b, addr) *(u32 *)(addr) = _swapl(b)
96*4882a593Smuzhiyun #elif defined(__XTENSA_EL__)
97*4882a593Smuzhiyun # define in_8(addr) (*(u8 *)(addr))
98*4882a593Smuzhiyun # define in_le16(addr) (*(u16 *)(addr))
99*4882a593Smuzhiyun # define in_le32(addr) (*(u32 *)(addr))
100*4882a593Smuzhiyun # define out_8(b, addr) *(u8 *)(addr) = (b)
101*4882a593Smuzhiyun # define out_le16(b, addr) *(u16 *)(addr) = (b)
102*4882a593Smuzhiyun # define out_le32(b, addr) *(u32 *)(addr) = (b)
103*4882a593Smuzhiyun #else
104*4882a593Smuzhiyun # error processor byte order undefined!
105*4882a593Smuzhiyun #endif
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /*
109*4882a593Smuzhiyun * Convert a physical pointer to a virtual kernel pointer for /dev/mem access
110*4882a593Smuzhiyun */
111*4882a593Smuzhiyun #define xlate_dev_mem_ptr(p) __va(p)
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun * Convert a virtual cached pointer to an uncached pointer
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun #define xlate_dev_kmem_ptr(p) p
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun #define MAP_NOCACHE (0)
119*4882a593Smuzhiyun #define MAP_WRCOMBINE (0)
120*4882a593Smuzhiyun #define MAP_WRBACK (0)
121*4882a593Smuzhiyun #define MAP_WRTHROUGH (0)
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun static inline void *
map_physmem(phys_addr_t paddr,unsigned long len,unsigned long flags)124*4882a593Smuzhiyun map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun return (void *)paddr;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun * Take down a mapping set up by map_physmem().
131*4882a593Smuzhiyun */
unmap_physmem(void * vaddr,unsigned long flags)132*4882a593Smuzhiyun static inline void unmap_physmem(void *vaddr, unsigned long flags)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
virt_to_phys(void * vaddr)136*4882a593Smuzhiyun static inline phys_addr_t virt_to_phys(void *vaddr)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun return (phys_addr_t)((unsigned long)vaddr);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun * Dummy function to keep U-Boot's cfi_flash.c driver happy.
143*4882a593Smuzhiyun */
sync(void)144*4882a593Smuzhiyun static inline void sync(void)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun #endif /* _XTENSA_IO_H */
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