1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2001 - 2012 Tensilica Inc. 3*4882a593Smuzhiyun * Copyright (C) 2014 - 2016 Cadence Design Systems Inc. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _XTENSA_BITOPS_H 9*4882a593Smuzhiyun #define _XTENSA_BITOPS_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <asm/system.h> 12*4882a593Smuzhiyun #include <asm-generic/bitops/fls.h> 13*4882a593Smuzhiyun #include <asm-generic/bitops/__fls.h> 14*4882a593Smuzhiyun #include <asm-generic/bitops/fls64.h> 15*4882a593Smuzhiyun #include <asm-generic/bitops/__ffs.h> 16*4882a593Smuzhiyun test_bit(int nr,const void * addr)17*4882a593Smuzhiyunstatic inline int test_bit(int nr, const void *addr) 18*4882a593Smuzhiyun { 19*4882a593Smuzhiyun return ((unsigned char *)addr)[nr >> 3] & (1u << (nr & 7)); 20*4882a593Smuzhiyun } 21*4882a593Smuzhiyun test_and_set_bit(int nr,volatile void * addr)22*4882a593Smuzhiyunstatic inline int test_and_set_bit(int nr, volatile void *addr) 23*4882a593Smuzhiyun { 24*4882a593Smuzhiyun unsigned long flags; 25*4882a593Smuzhiyun unsigned char tmp; 26*4882a593Smuzhiyun unsigned char mask = 1u << (nr & 7); 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun local_irq_save(flags); 29*4882a593Smuzhiyun tmp = ((unsigned char *)addr)[nr >> 3]; 30*4882a593Smuzhiyun ((unsigned char *)addr)[nr >> 3] |= mask; 31*4882a593Smuzhiyun local_irq_restore(flags); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun return tmp & mask; 34*4882a593Smuzhiyun } 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #endif /* _XTENSA_BITOPS_H */ 37