1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * (C) Copyright 2008 - 2013 Tensilica, Inc. 3*4882a593Smuzhiyun * (C) Copyright 2014 - 2016 Cadence Design Systems Inc. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include <config.h> 9*4882a593Smuzhiyun#include <asm/ldscript.h> 10*4882a593Smuzhiyun#include <asm/arch/core.h> 11*4882a593Smuzhiyun#include <asm/addrspace.h> 12*4882a593Smuzhiyun#include <asm-offsets.h> 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunOUTPUT_ARCH(xtensa) 15*4882a593SmuzhiyunENTRY(_start) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/* 18*4882a593Smuzhiyun * U-Boot resets from SYSROM and unpacks itself from a ROM store to RAM. 19*4882a593Smuzhiyun * The reset vector is usually near the base of SYSROM and has room 20*4882a593Smuzhiyun * above it for the ROM store into which the rest of U-Boot is packed. 21*4882a593Smuzhiyun * The ROM store also needs to be above any other vectors that are in ROM. 22*4882a593Smuzhiyun * If a core has its vectors near the top of ROM, this must be edited. 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * Note that to run C code out of ROM, the processor would have to support 25*4882a593Smuzhiyun * 'relocatable' exception vectors and provide a scratch memory for the 26*4882a593Smuzhiyun * initial stack. Not all Xtensa processor configurations support that, so 27*4882a593Smuzhiyun * we can simplify the boot process and unpack U-Boot to RAM immediately. 28*4882a593Smuzhiyun * This, however, requires that memory have been initialized throug some 29*4882a593Smuzhiyun * other means (serial ROM, for example) or are initialized early (requiring 30*4882a593Smuzhiyun * an assembler function. See start.S for more details) 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunSECTIONS 34*4882a593Smuzhiyun{ 35*4882a593Smuzhiyun . = + SIZEOF_HEADERS; 36*4882a593Smuzhiyun SECTION_ResetVector(XCHAL_RESET_VECTOR_VADDR, LMA_EQ_VMA) 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun .reloc_table ALIGN(4) : FOLLOWING(.ResetVector.text) 39*4882a593Smuzhiyun { 40*4882a593Smuzhiyun __reloc_table_start = ABSOLUTE(.); 41*4882a593Smuzhiyun#if XCHAL_HAVE_WINDOWED 42*4882a593Smuzhiyun RELOCATE2(WindowVectors,text); 43*4882a593Smuzhiyun#endif 44*4882a593Smuzhiyun RELOCATE2(KernelExceptionVector,literal); 45*4882a593Smuzhiyun RELOCATE2(KernelExceptionVector,text); 46*4882a593Smuzhiyun RELOCATE2(UserExceptionVector,literal); 47*4882a593Smuzhiyun RELOCATE2(UserExceptionVector,text); 48*4882a593Smuzhiyun RELOCATE2(DoubleExceptionVector,literal); 49*4882a593Smuzhiyun RELOCATE2(DoubleExceptionVector,text); 50*4882a593Smuzhiyun RELOCATE1(text); 51*4882a593Smuzhiyun RELOCATE1(rodata); 52*4882a593Smuzhiyun RELOCATE1(data); 53*4882a593Smuzhiyun RELOCATE1(u_boot_list); 54*4882a593Smuzhiyun __reloc_table_end = ABSOLUTE(.); 55*4882a593Smuzhiyun } 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun#if XCHAL_HAVE_WINDOWED 58*4882a593Smuzhiyun SECTION_VECTOR(WindowVectors,text,XCHAL_WINDOW_VECTORS_VADDR, 59*4882a593Smuzhiyun FOLLOWING(.reloc_table)) 60*4882a593Smuzhiyun SECTION_VECTOR(KernelExceptionVector,literal,XCHAL_KERNEL_VECTOR_VADDR-8, 61*4882a593Smuzhiyun FOLLOWING(.WindowVectors.text)) 62*4882a593Smuzhiyun#else 63*4882a593Smuzhiyun SECTION_VECTOR(KernelExceptionVector,literal,XCHAL_KERNEL_VECTOR_VADDR-8, 64*4882a593Smuzhiyun FOLLOWING(.reloc_table)) 65*4882a593Smuzhiyun#endif 66*4882a593Smuzhiyun SECTION_VECTOR(KernelExceptionVector,text,XCHAL_KERNEL_VECTOR_VADDR, 67*4882a593Smuzhiyun FOLLOWING(.KernelExceptionVector.literal)) 68*4882a593Smuzhiyun SECTION_VECTOR(UserExceptionVector,literal,XCHAL_USER_VECTOR_VADDR-8, 69*4882a593Smuzhiyun FOLLOWING(.KernelExceptionVector.text)) 70*4882a593Smuzhiyun SECTION_VECTOR(UserExceptionVector,text,XCHAL_USER_VECTOR_VADDR, 71*4882a593Smuzhiyun FOLLOWING(.UserExceptionVector.literal)) 72*4882a593Smuzhiyun SECTION_VECTOR(DoubleExceptionVector,literal,XCHAL_DOUBLEEXC_VECTOR_VADDR-8, 73*4882a593Smuzhiyun FOLLOWING(.UserExceptionVector.text)) 74*4882a593Smuzhiyun SECTION_VECTOR(DoubleExceptionVector,text,XCHAL_DOUBLEEXC_VECTOR_VADDR, 75*4882a593Smuzhiyun FOLLOWING(.DoubleExceptionVector.literal)) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun __monitor_start = CONFIG_SYS_TEXT_ADDR; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun SECTION_text(CONFIG_SYS_TEXT_ADDR, FOLLOWING(.DoubleExceptionVector.text)) 80*4882a593Smuzhiyun SECTION_rodata(ALIGN(16), FOLLOWING(.text)) 81*4882a593Smuzhiyun SECTION_u_boot_list(ALIGN(16), FOLLOWING(.rodata)) 82*4882a593Smuzhiyun SECTION_data(ALIGN(16), FOLLOWING(.u_boot_list)) 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun __reloc_end = .; 85*4882a593Smuzhiyun __init_end = .; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun SECTION_bss(__init_end (OVERLAY),) 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun __monitor_end = .; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* 92*4882a593Smuzhiyun * On many Xtensa boards a region of RAM may be mapped to the ROM address 93*4882a593Smuzhiyun * space to facilitate on-chip-debug, and U-Boot must fit with that region. 94*4882a593Smuzhiyun * The config variables CONFIG_SYS_MONITOR_* define the region. 95*4882a593Smuzhiyun * If U-Boot extends beyond this region it will appear discontiguous in the 96*4882a593Smuzhiyun * address space and is in danger of overwriting itself during unpacking 97*4882a593Smuzhiyun * ("relocation"). 98*4882a593Smuzhiyun * This causes U-Boot to crash in a way that is difficult to debug. On some 99*4882a593Smuzhiyun * boards (such as xtav60) the region is small enough that U-Boot will not 100*4882a593Smuzhiyun * fit if compiled entirely with -O0 (a common scenario). To avoid a lengthy 101*4882a593Smuzhiyun * debugging session when this happens, ensure a link-time error occurs. 102*4882a593Smuzhiyun * 103*4882a593Smuzhiyun */ 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun ASSERT(__monitor_end - __monitor_start <= CONFIG_SYS_MONITOR_LEN, 106*4882a593Smuzhiyun "U-Boot ROM image is too large. Check optimization level.") 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun SECTION_xtensa 109*4882a593Smuzhiyun SECTION_debug 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /DISCARD/ : { *(.dynstr*) } 112*4882a593Smuzhiyun /DISCARD/ : { *(.hash*) } 113*4882a593Smuzhiyun /DISCARD/ : { *(.interp) } 114*4882a593Smuzhiyun /DISCARD/ : { *(.got*) } 115*4882a593Smuzhiyun /DISCARD/ : { *(.dynsym) } 116*4882a593Smuzhiyun} 117