xref: /OK3568_Linux_fs/u-boot/arch/x86/lib/init_helpers.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2011
3*4882a593Smuzhiyun  * Graeme Russ, <graeme.russ@gmail.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <linux/errno.h>
10*4882a593Smuzhiyun #include <asm/mtrr.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /* Get the top of usable RAM */
board_get_usable_ram_top(ulong total_size)15*4882a593Smuzhiyun __weak ulong board_get_usable_ram_top(ulong total_size)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun 	return gd->ram_size;
18*4882a593Smuzhiyun }
19*4882a593Smuzhiyun 
init_cache_f_r(void)20*4882a593Smuzhiyun int init_cache_f_r(void)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP)
23*4882a593Smuzhiyun 	int ret;
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	ret = mtrr_commit(false);
26*4882a593Smuzhiyun 	/* If MTRR MSR is not implemented by the processor, just ignore it */
27*4882a593Smuzhiyun 	if (ret && ret != -ENOSYS)
28*4882a593Smuzhiyun 		return ret;
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun 	/* Initialise the CPU cache(s) */
31*4882a593Smuzhiyun 	return init_cache();
32*4882a593Smuzhiyun }
33