xref: /OK3568_Linux_fs/u-boot/arch/x86/include/asm/sfi.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright(c) 2009 Intel Corporation. All rights reserved.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+	BSD-3-Clause
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef _LINUX_SFI_H
8*4882a593Smuzhiyun #define _LINUX_SFI_H
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <errno.h>
11*4882a593Smuzhiyun #include <linux/types.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun /* Table signatures reserved by the SFI specification */
14*4882a593Smuzhiyun #define SFI_SIG_SYST		"SYST"
15*4882a593Smuzhiyun #define SFI_SIG_FREQ		"FREQ"
16*4882a593Smuzhiyun #define SFI_SIG_CPUS		"CPUS"
17*4882a593Smuzhiyun #define SFI_SIG_MTMR		"MTMR"
18*4882a593Smuzhiyun #define SFI_SIG_MRTC		"MRTC"
19*4882a593Smuzhiyun #define SFI_SIG_MMAP		"MMAP"
20*4882a593Smuzhiyun #define SFI_SIG_APIC		"APIC"
21*4882a593Smuzhiyun #define SFI_SIG_XSDT		"XSDT"
22*4882a593Smuzhiyun #define SFI_SIG_WAKE		"WAKE"
23*4882a593Smuzhiyun #define SFI_SIG_DEVS		"DEVS"
24*4882a593Smuzhiyun #define SFI_SIG_GPIO		"GPIO"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define SFI_SIGNATURE_SIZE	4
27*4882a593Smuzhiyun #define SFI_OEM_ID_SIZE		6
28*4882a593Smuzhiyun #define SFI_OEM_TABLE_ID_SIZE	8
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define SFI_NAME_LEN		16
31*4882a593Smuzhiyun #define SFI_TABLE_MAX_ENTRIES	16
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define SFI_GET_NUM_ENTRIES(ptable, entry_type) \
34*4882a593Smuzhiyun 	((ptable->header.len - sizeof(struct sfi_table_header)) / \
35*4882a593Smuzhiyun 	(sizeof(entry_type)))
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun  * Table structures must be byte-packed to match the SFI specification,
38*4882a593Smuzhiyun  * as they are provided by the BIOS.
39*4882a593Smuzhiyun  */
40*4882a593Smuzhiyun struct __packed sfi_table_header {
41*4882a593Smuzhiyun 	char	sig[SFI_SIGNATURE_SIZE];
42*4882a593Smuzhiyun 	u32	len;
43*4882a593Smuzhiyun 	u8	rev;
44*4882a593Smuzhiyun 	u8	csum;
45*4882a593Smuzhiyun 	char	oem_id[SFI_OEM_ID_SIZE];
46*4882a593Smuzhiyun 	char	oem_table_id[SFI_OEM_TABLE_ID_SIZE];
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun struct __packed sfi_table_simple {
50*4882a593Smuzhiyun 	struct sfi_table_header		header;
51*4882a593Smuzhiyun 	u64				pentry[1];
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /* Comply with UEFI spec 2.1 */
55*4882a593Smuzhiyun struct __packed sfi_mem_entry {
56*4882a593Smuzhiyun 	u32	type;
57*4882a593Smuzhiyun 	u64	phys_start;
58*4882a593Smuzhiyun 	u64	virt_start;
59*4882a593Smuzhiyun 	u64	pages;
60*4882a593Smuzhiyun 	u64	attrib;
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /* Memory type definitions */
64*4882a593Smuzhiyun enum sfi_mem_type {
65*4882a593Smuzhiyun 	SFI_MEM_RESERVED,
66*4882a593Smuzhiyun 	SFI_LOADER_CODE,
67*4882a593Smuzhiyun 	SFI_LOADER_DATA,
68*4882a593Smuzhiyun 	SFI_BOOT_SERVICE_CODE,
69*4882a593Smuzhiyun 	SFI_BOOT_SERVICE_DATA,
70*4882a593Smuzhiyun 	SFI_RUNTIME_SERVICE_CODE,
71*4882a593Smuzhiyun 	SFI_RUNTIME_SERVICE_DATA,
72*4882a593Smuzhiyun 	SFI_MEM_CONV,
73*4882a593Smuzhiyun 	SFI_MEM_UNUSABLE,
74*4882a593Smuzhiyun 	SFI_ACPI_RECLAIM,
75*4882a593Smuzhiyun 	SFI_ACPI_NVS,
76*4882a593Smuzhiyun 	SFI_MEM_MMIO,
77*4882a593Smuzhiyun 	SFI_MEM_IOPORT,
78*4882a593Smuzhiyun 	SFI_PAL_CODE,
79*4882a593Smuzhiyun 	SFI_MEM_TYPEMAX,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun struct __packed sfi_cpu_table_entry {
83*4882a593Smuzhiyun 	u32	apic_id;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun struct __packed sfi_cstate_table_entry {
87*4882a593Smuzhiyun 	u32	hint;		/* MWAIT hint */
88*4882a593Smuzhiyun 	u32	latency;	/* latency in ms */
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun struct __packed sfi_apic_table_entry {
92*4882a593Smuzhiyun 	u64	phys_addr;	/* phy base addr for APIC reg */
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun struct __packed sfi_freq_table_entry {
96*4882a593Smuzhiyun 	u32	freq_mhz;	/* in MHZ */
97*4882a593Smuzhiyun 	u32	latency;	/* transition latency in ms */
98*4882a593Smuzhiyun 	u32	ctrl_val;	/* value to write to PERF_CTL */
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun struct __packed sfi_wake_table_entry {
102*4882a593Smuzhiyun 	u64	phys_addr;	/* pointer to where the wake vector locates */
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun struct __packed sfi_timer_table_entry {
106*4882a593Smuzhiyun 	u64	phys_addr;	/* phy base addr for the timer */
107*4882a593Smuzhiyun 	u32	freq_hz;	/* in HZ */
108*4882a593Smuzhiyun 	u32	irq;
109*4882a593Smuzhiyun };
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun struct __packed sfi_rtc_table_entry {
112*4882a593Smuzhiyun 	u64	phys_addr;	/* phy base addr for the RTC */
113*4882a593Smuzhiyun 	u32	irq;
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun struct __packed sfi_device_table_entry {
117*4882a593Smuzhiyun 	u8	type;		/* bus type, I2C, SPI or ...*/
118*4882a593Smuzhiyun 	u8	host_num;	/* attached to host 0, 1...*/
119*4882a593Smuzhiyun 	u16	addr;
120*4882a593Smuzhiyun 	u8	irq;
121*4882a593Smuzhiyun 	u32	max_freq;
122*4882a593Smuzhiyun 	char	name[SFI_NAME_LEN];
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun enum {
126*4882a593Smuzhiyun 	SFI_DEV_TYPE_SPI	= 0,
127*4882a593Smuzhiyun 	SFI_DEV_TYPE_I2C,
128*4882a593Smuzhiyun 	SFI_DEV_TYPE_UART,
129*4882a593Smuzhiyun 	SFI_DEV_TYPE_HSI,
130*4882a593Smuzhiyun 	SFI_DEV_TYPE_IPC,
131*4882a593Smuzhiyun 	SFI_DEV_TYPE_SD,
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun struct __packed sfi_gpio_table_entry {
135*4882a593Smuzhiyun 	char	controller_name[SFI_NAME_LEN];
136*4882a593Smuzhiyun 	u16	pin_no;
137*4882a593Smuzhiyun 	char	pin_name[SFI_NAME_LEN];
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun struct sfi_xsdt_header {
141*4882a593Smuzhiyun 	uint32_t oem_revision;
142*4882a593Smuzhiyun 	uint32_t creator_id;
143*4882a593Smuzhiyun 	uint32_t creator_revision;
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun typedef int (*sfi_table_handler) (struct sfi_table_header *table);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun /**
149*4882a593Smuzhiyun  * write_sfi_table() - Write Simple Firmware Interface tables
150*4882a593Smuzhiyun  *
151*4882a593Smuzhiyun  * @base:	Address to write table to
152*4882a593Smuzhiyun  * @return address to use for the next table
153*4882a593Smuzhiyun  */
154*4882a593Smuzhiyun ulong write_sfi_table(ulong base);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #endif /*_LINUX_SFI_H */
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