1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Adapted from coreboot src/include/device/pnp_def.h
5*4882a593Smuzhiyun * and arch/x86/include/arch/io.h
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #ifndef _ASM_PNP_DEF_H_
11*4882a593Smuzhiyun #define _ASM_PNP_DEF_H_
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define PNP_IDX_EN 0x30
16*4882a593Smuzhiyun #define PNP_IDX_IO0 0x60
17*4882a593Smuzhiyun #define PNP_IDX_IO1 0x62
18*4882a593Smuzhiyun #define PNP_IDX_IO2 0x64
19*4882a593Smuzhiyun #define PNP_IDX_IO3 0x66
20*4882a593Smuzhiyun #define PNP_IDX_IRQ0 0x70
21*4882a593Smuzhiyun #define PNP_IDX_IRQ1 0x72
22*4882a593Smuzhiyun #define PNP_IDX_DRQ0 0x74
23*4882a593Smuzhiyun #define PNP_IDX_DRQ1 0x75
24*4882a593Smuzhiyun #define PNP_IDX_MSC0 0xf0
25*4882a593Smuzhiyun #define PNP_IDX_MSC1 0xf1
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* Generic functions for pnp devices */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun * pnp device is a 16-bit integer composed of its i/o port address at high byte
31*4882a593Smuzhiyun * and logic function number at low byte.
32*4882a593Smuzhiyun */
33*4882a593Smuzhiyun #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
34*4882a593Smuzhiyun
pnp_write_config(uint16_t dev,uint8_t reg,uint8_t value)35*4882a593Smuzhiyun static inline void pnp_write_config(uint16_t dev, uint8_t reg, uint8_t value)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun uint8_t port = dev >> 8;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun outb(reg, port);
40*4882a593Smuzhiyun outb(value, port + 1);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
pnp_read_config(uint16_t dev,uint8_t reg)43*4882a593Smuzhiyun static inline uint8_t pnp_read_config(uint16_t dev, uint8_t reg)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun uint8_t port = dev >> 8;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun outb(reg, port);
48*4882a593Smuzhiyun return inb(port + 1);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
pnp_set_logical_device(uint16_t dev)51*4882a593Smuzhiyun static inline void pnp_set_logical_device(uint16_t dev)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun uint8_t device = dev & 0xff;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun pnp_write_config(dev, 0x07, device);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
pnp_set_enable(uint16_t dev,int enable)58*4882a593Smuzhiyun static inline void pnp_set_enable(uint16_t dev, int enable)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun pnp_write_config(dev, PNP_IDX_EN, enable ? 1 : 0);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
pnp_read_enable(uint16_t dev)63*4882a593Smuzhiyun static inline int pnp_read_enable(uint16_t dev)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun return !!pnp_read_config(dev, PNP_IDX_EN);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
pnp_set_iobase(uint16_t dev,uint8_t index,uint16_t iobase)68*4882a593Smuzhiyun static inline void pnp_set_iobase(uint16_t dev, uint8_t index, uint16_t iobase)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
71*4882a593Smuzhiyun pnp_write_config(dev, index + 1, iobase & 0xff);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
pnp_read_iobase(uint16_t dev,uint8_t index)74*4882a593Smuzhiyun static inline uint16_t pnp_read_iobase(uint16_t dev, uint8_t index)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun return ((uint16_t)(pnp_read_config(dev, index)) << 8) |
77*4882a593Smuzhiyun pnp_read_config(dev, index + 1);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
pnp_set_irq(uint16_t dev,uint8_t index,unsigned irq)80*4882a593Smuzhiyun static inline void pnp_set_irq(uint16_t dev, uint8_t index, unsigned irq)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun pnp_write_config(dev, index, irq);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
pnp_set_drq(uint16_t dev,uint8_t index,unsigned drq)85*4882a593Smuzhiyun static inline void pnp_set_drq(uint16_t dev, uint8_t index, unsigned drq)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun pnp_write_config(dev, index, drq & 0xff);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #endif /* _ASM_PNP_DEF_H_ */
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