1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2016 Google, Inc 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __ASM_LPC_COMMON_H 8*4882a593Smuzhiyun #define __ASM_LPC_COMMON_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define PCH_RCBA_BASE 0xf0 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define RC 0x3400 /* 32bit */ 13*4882a593Smuzhiyun #define GCS 0x3410 /* 32bit */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define PMBASE 0x40 16*4882a593Smuzhiyun #define ACPI_CNTL 0x44 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define LPC_IO_DEC 0x80 /* IO Decode Ranges Register */ 19*4882a593Smuzhiyun #define COMB_DEC_RANGE (1 << 4) /* 0x2f8-0x2ff (COM2) */ 20*4882a593Smuzhiyun #define COMA_DEC_RANGE (0 << 0) /* 0x3f8-0x3ff (COM1) */ 21*4882a593Smuzhiyun #define LPC_EN 0x82 /* LPC IF Enables Register */ 22*4882a593Smuzhiyun #define CNF2_LPC_EN (1 << 13) /* 0x4e/0x4f */ 23*4882a593Smuzhiyun #define CNF1_LPC_EN (1 << 12) /* 0x2e/0x2f */ 24*4882a593Smuzhiyun #define MC_LPC_EN (1 << 11) /* 0x62/0x66 */ 25*4882a593Smuzhiyun #define KBC_LPC_EN (1 << 10) /* 0x60/0x64 */ 26*4882a593Smuzhiyun #define GAMEH_LPC_EN (1 << 9) /* 0x208/0x20f */ 27*4882a593Smuzhiyun #define GAMEL_LPC_EN (1 << 8) /* 0x200/0x207 */ 28*4882a593Smuzhiyun #define FDD_LPC_EN (1 << 3) /* LPC_IO_DEC[12] */ 29*4882a593Smuzhiyun #define LPT_LPC_EN (1 << 2) /* LPC_IO_DEC[9:8] */ 30*4882a593Smuzhiyun #define COMB_LPC_EN (1 << 1) /* LPC_IO_DEC[6:4] */ 31*4882a593Smuzhiyun #define COMA_LPC_EN (1 << 0) /* LPC_IO_DEC[3:2] */ 32*4882a593Smuzhiyun #define LPC_GEN1_DEC 0x84 /* LPC IF Generic Decode Range 1 */ 33*4882a593Smuzhiyun #define LPC_GEN2_DEC 0x88 /* LPC IF Generic Decode Range 2 */ 34*4882a593Smuzhiyun #define LPC_GEN3_DEC 0x8c /* LPC IF Generic Decode Range 3 */ 35*4882a593Smuzhiyun #define LPC_GEN4_DEC 0x90 /* LPC IF Generic Decode Range 4 */ 36*4882a593Smuzhiyun #define LPC_GENX_DEC(x) (0x84 + 4 * (x)) 37*4882a593Smuzhiyun #define GEN_DEC_RANGE_256B 0xfc0000 /* 256 Bytes */ 38*4882a593Smuzhiyun #define GEN_DEC_RANGE_128B 0x7c0000 /* 128 Bytes */ 39*4882a593Smuzhiyun #define GEN_DEC_RANGE_64B 0x3c0000 /* 64 Bytes */ 40*4882a593Smuzhiyun #define GEN_DEC_RANGE_32B 0x1c0000 /* 32 Bytes */ 41*4882a593Smuzhiyun #define GEN_DEC_RANGE_16B 0x0c0000 /* 16 Bytes */ 42*4882a593Smuzhiyun #define GEN_DEC_RANGE_8B 0x040000 /* 8 Bytes */ 43*4882a593Smuzhiyun #define GEN_DEC_RANGE_4B 0x000000 /* 4 Bytes */ 44*4882a593Smuzhiyun #define GEN_DEC_RANGE_EN (1 << 0) /* Range Enable */ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /** 47*4882a593Smuzhiyun * lpc_common_early_init() - Set up common LPC init 48*4882a593Smuzhiyun * 49*4882a593Smuzhiyun * This sets up the legacy decode areas, GEN_DEC, SPI prefetch and Port80. It 50*4882a593Smuzhiyun * also puts the RCB in the correct place so that RCB_REG() works. 51*4882a593Smuzhiyun * 52*4882a593Smuzhiyun * @dev: LPC device (a child of the PCH) 53*4882a593Smuzhiyun * @return 0 on success, -ve on error 54*4882a593Smuzhiyun */ 55*4882a593Smuzhiyun int lpc_common_early_init(struct udevice *dev); 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun int lpc_set_spi_protect(struct udevice *dev, int bios_ctrl, bool protect); 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #endif 60