1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * From coreboot file of the same name 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2010 coresystems GmbH 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __ASM_IOAPIC_H 10*4882a593Smuzhiyun #define __ASM_IOAPIC_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define IO_APIC_ADDR 0xfec00000 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* Direct addressed register */ 15*4882a593Smuzhiyun #define IO_APIC_INDEX (IO_APIC_ADDR + 0x00) 16*4882a593Smuzhiyun #define IO_APIC_DATA (IO_APIC_ADDR + 0x10) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* Indirect addressed register offset */ 19*4882a593Smuzhiyun #define IO_APIC_ID 0x00 20*4882a593Smuzhiyun #define IO_APIC_VER 0x01 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /** 23*4882a593Smuzhiyun * io_apic_read() - Read I/O APIC register 24*4882a593Smuzhiyun * 25*4882a593Smuzhiyun * This routine reads I/O APIC indirect addressed register. 26*4882a593Smuzhiyun * 27*4882a593Smuzhiyun * @reg: address of indirect addressed register 28*4882a593Smuzhiyun * @return: register value to read 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun u32 io_apic_read(u32 reg); 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /** 33*4882a593Smuzhiyun * io_apic_write() - Write I/O APIC register 34*4882a593Smuzhiyun * 35*4882a593Smuzhiyun * This routine writes I/O APIC indirect addressed register. 36*4882a593Smuzhiyun * 37*4882a593Smuzhiyun * @reg: address of indirect addressed register 38*4882a593Smuzhiyun * @val: register value to write 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun void io_apic_write(u32 reg, u32 val); 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun void io_apic_set_id(int ioapic_id); 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #endif 45