1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2009 3*4882a593Smuzhiyun * Graeme Russ, graeme.russ@gmail.com 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * (C) Copyright 2002 6*4882a593Smuzhiyun * Daniel Engström, Omicron Ceti AB, daniel@omicron.se 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __ASM_INTERRUPT_H_ 12*4882a593Smuzhiyun #define __ASM_INTERRUPT_H_ 1 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <asm/types.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define SYS_NUM_IRQS 16 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* Architecture defined exceptions */ 19*4882a593Smuzhiyun enum x86_exception { 20*4882a593Smuzhiyun EXC_DE = 0, 21*4882a593Smuzhiyun EXC_DB, 22*4882a593Smuzhiyun EXC_NMI, 23*4882a593Smuzhiyun EXC_BP, 24*4882a593Smuzhiyun EXC_OF, 25*4882a593Smuzhiyun EXC_BR, 26*4882a593Smuzhiyun EXC_UD, 27*4882a593Smuzhiyun EXC_NM, 28*4882a593Smuzhiyun EXC_DF, 29*4882a593Smuzhiyun EXC_CSO, 30*4882a593Smuzhiyun EXC_TS, 31*4882a593Smuzhiyun EXC_NP, 32*4882a593Smuzhiyun EXC_SS, 33*4882a593Smuzhiyun EXC_GP, 34*4882a593Smuzhiyun EXC_PF, 35*4882a593Smuzhiyun EXC_MF = 16, 36*4882a593Smuzhiyun EXC_AC, 37*4882a593Smuzhiyun EXC_MC, 38*4882a593Smuzhiyun EXC_XM, 39*4882a593Smuzhiyun EXC_VE 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* arch/x86/cpu/interrupts.c */ 43*4882a593Smuzhiyun void set_vector(u8 intnum, void *routine); 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* Architecture specific functions */ 46*4882a593Smuzhiyun void mask_irq(int irq); 47*4882a593Smuzhiyun void unmask_irq(int irq); 48*4882a593Smuzhiyun void specific_eoi(int irq); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun extern char exception_stack[]; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /** 53*4882a593Smuzhiyun * configure_irq_trigger() - Configure IRQ triggering 54*4882a593Smuzhiyun * 55*4882a593Smuzhiyun * Switch the given interrupt to be level / edge triggered 56*4882a593Smuzhiyun * 57*4882a593Smuzhiyun * @param int_num legacy interrupt number (3-7, 9-15) 58*4882a593Smuzhiyun * @param is_level_triggered true for level triggered interrupt, false for 59*4882a593Smuzhiyun * edge triggered interrupt 60*4882a593Smuzhiyun */ 61*4882a593Smuzhiyun void configure_irq_trigger(int int_num, bool is_level_triggered); 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun void *x86_get_idt(void); 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #endif 66