1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _QUEENSBAY_DEVICE_H_ 8*4882a593Smuzhiyun #define _QUEENSBAY_DEVICE_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <pci.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* TunnelCreek PCI Devices */ 13*4882a593Smuzhiyun #define TNC_HOST_BRIDGE_DEV 0 14*4882a593Smuzhiyun #define TNC_HOST_BRIDGE_FUNC 0 15*4882a593Smuzhiyun #define TNC_IGD_DEV 2 16*4882a593Smuzhiyun #define TNC_IGD_FUNC 0 17*4882a593Smuzhiyun #define TNC_SDVO_DEV 3 18*4882a593Smuzhiyun #define TNC_SDVO_FUNC 0 19*4882a593Smuzhiyun #define TNC_PCIE0_DEV 23 20*4882a593Smuzhiyun #define TNC_PCIE0_FUNC 0 21*4882a593Smuzhiyun #define TNC_PCIE1_DEV 24 22*4882a593Smuzhiyun #define TNC_PCIE1_FUNC 0 23*4882a593Smuzhiyun #define TNC_PCIE2_DEV 25 24*4882a593Smuzhiyun #define TNC_PCIE2_FUNC 0 25*4882a593Smuzhiyun #define TNC_PCIE3_DEV 26 26*4882a593Smuzhiyun #define TNC_PCIE3_FUNC 0 27*4882a593Smuzhiyun #define TNC_HDA_DEV 27 28*4882a593Smuzhiyun #define TNC_HDA_FUNC 0 29*4882a593Smuzhiyun #define TNC_LPC_DEV 31 30*4882a593Smuzhiyun #define TNC_LPC_FUNC 0 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define TNC_HOST_BRIDGE \ 33*4882a593Smuzhiyun PCI_BDF(0, TNC_HOST_BRIDGE_DEV, TNC_HOST_BRIDGE_FUNC) 34*4882a593Smuzhiyun #define TNC_IGD \ 35*4882a593Smuzhiyun PCI_BDF(0, TNC_IGD_DEV, TNC_IGD_FUNC) 36*4882a593Smuzhiyun #define TNC_SDVO \ 37*4882a593Smuzhiyun PCI_BDF(0, TNC_SDVO_DEV, TNC_SDVO_FUNC) 38*4882a593Smuzhiyun #define TNC_PCIE0 \ 39*4882a593Smuzhiyun PCI_BDF(0, TNC_PCIE0_DEV, TNC_PCIE0_FUNC) 40*4882a593Smuzhiyun #define TNC_PCIE1 \ 41*4882a593Smuzhiyun PCI_BDF(0, TNC_PCIE1_DEV, TNC_PCIE1_FUNC) 42*4882a593Smuzhiyun #define TNC_PCIE2 \ 43*4882a593Smuzhiyun PCI_BDF(0, TNC_PCIE2_DEV, TNC_PCIE2_FUNC) 44*4882a593Smuzhiyun #define TNC_PCIE3 \ 45*4882a593Smuzhiyun PCI_BDF(0, TNC_PCIE3_DEV, TNC_PCIE3_FUNC) 46*4882a593Smuzhiyun #define TNC_HDA \ 47*4882a593Smuzhiyun PCI_BDF(0, TNC_HDA_DEV, TNC_HDA_FUNC) 48*4882a593Smuzhiyun #define TNC_LPC \ 49*4882a593Smuzhiyun PCI_BDF(0, TNC_LPC_DEV, TNC_LPC_FUNC) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Topcliff IOH PCI Devices */ 52*4882a593Smuzhiyun #define TCF_PCIE_PORT_DEV 0 53*4882a593Smuzhiyun #define TCF_PCIE_PORT_FUNC 0 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define TCF_DEV_0 0 56*4882a593Smuzhiyun #define TCF_PKT_HUB_FUNC 0 57*4882a593Smuzhiyun #define TCF_GBE_FUNC 1 58*4882a593Smuzhiyun #define TCF_GPIO_FUNC 2 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define TCF_DEV_2 2 61*4882a593Smuzhiyun #define TCF_USB1_OHCI0_FUNC 0 62*4882a593Smuzhiyun #define TCF_USB1_OHCI1_FUNC 1 63*4882a593Smuzhiyun #define TCF_USB1_OHCI2_FUNC 2 64*4882a593Smuzhiyun #define TCF_USB1_EHCI_FUNC 3 65*4882a593Smuzhiyun #define TCF_USB_DEVICE_FUNC 4 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #define TCF_DEV_4 4 68*4882a593Smuzhiyun #define TCF_SDIO0_FUNC 0 69*4882a593Smuzhiyun #define TCF_SDIO1_FUNC 1 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define TCF_DEV_6 6 72*4882a593Smuzhiyun #define TCF_SATA_FUNC 0 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #define TCF_DEV_8 8 75*4882a593Smuzhiyun #define TCF_USB2_OHCI0_FUNC 0 76*4882a593Smuzhiyun #define TCF_USB2_OHCI1_FUNC 1 77*4882a593Smuzhiyun #define TCF_USB2_OHCI2_FUNC 2 78*4882a593Smuzhiyun #define TCF_USB2_EHCI_FUNC 3 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #define TCF_DEV_10 10 81*4882a593Smuzhiyun #define TCF_DMA1_FUNC 0 82*4882a593Smuzhiyun #define TCF_UART0_FUNC 1 83*4882a593Smuzhiyun #define TCF_UART1_FUNC 2 84*4882a593Smuzhiyun #define TCF_UART2_FUNC 3 85*4882a593Smuzhiyun #define TCF_UART3_FUNC 4 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define TCF_DEV_12 12 88*4882a593Smuzhiyun #define TCF_DMA2_FUNC 0 89*4882a593Smuzhiyun #define TCF_SPI_FUNC 1 90*4882a593Smuzhiyun #define TCF_I2C_FUNC 2 91*4882a593Smuzhiyun #define TCF_CAN_FUNC 3 92*4882a593Smuzhiyun #define TCF_1588_FUNC 4 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #endif /* _QUEENSBAY_DEVICE_H_ */ 95