1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _QUARK_IOMAP_H_ 8*4882a593Smuzhiyun #define _QUARK_IOMAP_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* Memory Mapped IO bases */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* ESRAM */ 13*4882a593Smuzhiyun #define ESRAM_BASE_ADDRESS CONFIG_ESRAM_BASE 14*4882a593Smuzhiyun #define ESRAM_BASE_SIZE ESRAM_SIZE 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* PCI Configuration Space */ 17*4882a593Smuzhiyun #define MCFG_BASE_ADDRESS CONFIG_PCIE_ECAM_BASE 18*4882a593Smuzhiyun #define MCFG_BASE_SIZE 0x10000000 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* High Performance Event Timer */ 21*4882a593Smuzhiyun #define HPET_BASE_ADDRESS 0xfed00000 22*4882a593Smuzhiyun #define HPET_BASE_SIZE 0x400 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* Root Complex Base Address */ 25*4882a593Smuzhiyun #define RCBA_BASE_ADDRESS CONFIG_RCBA_BASE 26*4882a593Smuzhiyun #define RCBA_BASE_SIZE 0x4000 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* IO Port bases */ 29*4882a593Smuzhiyun #define ACPI_PM1_BASE_ADDRESS CONFIG_ACPI_PM1_BASE 30*4882a593Smuzhiyun #define ACPI_PM1_BASE_SIZE 0x10 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define ACPI_PBLK_BASE_ADDRESS CONFIG_ACPI_PBLK_BASE 33*4882a593Smuzhiyun #define ACPI_PBLK_BASE_SIZE 0x10 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define SPI_DMA_BASE_ADDRESS CONFIG_SPI_DMA_BASE 36*4882a593Smuzhiyun #define SPI_DMA_BASE_SIZE 0x10 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define GPIO_BASE_ADDRESS CONFIG_GPIO_BASE 39*4882a593Smuzhiyun #define GPIO_BASE_SIZE 0x80 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define ACPI_GPE0_BASE_ADDRESS CONFIG_ACPI_GPE0_BASE 42*4882a593Smuzhiyun #define ACPI_GPE0_BASE_SIZE 0x40 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define WDT_BASE_ADDRESS CONFIG_WDT_BASE 45*4882a593Smuzhiyun #define WDT_BASE_SIZE 0x40 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #endif /* _QUARK_IOMAP_H_ */ 48