1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2013 Google Inc. 3*4882a593Smuzhiyun * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Modified from coreboot src/soc/intel/baytrail/include/soc/iomap.h 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _BAYTRAIL_IOMAP_H_ 11*4882a593Smuzhiyun #define _BAYTRAIL_IOMAP_H_ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* Memory Mapped IO bases */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* PCI Configuration Space */ 16*4882a593Smuzhiyun #define MCFG_BASE_ADDRESS CONFIG_PCIE_ECAM_BASE 17*4882a593Smuzhiyun #define MCFG_BASE_SIZE 0x10000000 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* Temporary Base Address */ 20*4882a593Smuzhiyun #define TEMP_BASE_ADDRESS 0xfd000000 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* Transactions in this range will abort */ 23*4882a593Smuzhiyun #define ABORT_BASE_ADDRESS 0xfeb00000 24*4882a593Smuzhiyun #define ABORT_BASE_SIZE 0x00100000 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* High Performance Event Timer */ 27*4882a593Smuzhiyun #define HPET_BASE_ADDRESS 0xfed00000 28*4882a593Smuzhiyun #define HPET_BASE_SIZE 0x400 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* SPI Bus */ 31*4882a593Smuzhiyun #define SPI_BASE_ADDRESS 0xfed01000 32*4882a593Smuzhiyun #define SPI_BASE_SIZE 0x400 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* Power Management Controller */ 35*4882a593Smuzhiyun #define PMC_BASE_ADDRESS 0xfed03000 36*4882a593Smuzhiyun #define PMC_BASE_SIZE 0x400 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define GEN_PMCON1 0x20 39*4882a593Smuzhiyun #define UART_EN (1 << 24) 40*4882a593Smuzhiyun #define DISB (1 << 23) 41*4882a593Smuzhiyun #define MEM_SR (1 << 21) 42*4882a593Smuzhiyun #define SRS (1 << 20) 43*4882a593Smuzhiyun #define CTS (1 << 19) 44*4882a593Smuzhiyun #define MS4V (1 << 18) 45*4882a593Smuzhiyun #define PWR_FLR (1 << 16) 46*4882a593Smuzhiyun #define PME_B0_S5_DIS (1 << 15) 47*4882a593Smuzhiyun #define SUS_PWR_FLR (1 << 14) 48*4882a593Smuzhiyun #define WOL_EN_OVRD (1 << 13) 49*4882a593Smuzhiyun #define DIS_SLP_X_STRCH_SUS_UP (1 << 12) 50*4882a593Smuzhiyun #define GEN_RST_STS (1 << 9) 51*4882a593Smuzhiyun #define RPS (1 << 2) 52*4882a593Smuzhiyun #define AFTERG3_EN (1 << 0) 53*4882a593Smuzhiyun #define GEN_PMCON2 0x24 54*4882a593Smuzhiyun #define SLPSX_STR_POL_LOCK (1 << 18) 55*4882a593Smuzhiyun #define BIOS_PCI_EXP_EN (1 << 10) 56*4882a593Smuzhiyun #define PWRBTN_LVL (1 << 9) 57*4882a593Smuzhiyun #define SMI_LOCK (1 << 4) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Power Management Unit */ 60*4882a593Smuzhiyun #define PUNIT_BASE_ADDRESS 0xfed05000 61*4882a593Smuzhiyun #define PUNIT_BASE_SIZE 0x800 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* Intel Legacy Block */ 64*4882a593Smuzhiyun #define ILB_BASE_ADDRESS 0xfed08000 65*4882a593Smuzhiyun #define ILB_BASE_SIZE 0x400 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /* IO Memory */ 68*4882a593Smuzhiyun #define IO_BASE_ADDRESS 0xfed0c000 69*4882a593Smuzhiyun #define IO_BASE_OFFSET_GPSCORE 0x0000 70*4882a593Smuzhiyun #define IO_BASE_OFFSET_GPNCORE 0x1000 71*4882a593Smuzhiyun #define IO_BASE_OFFSET_GPSSUS 0x2000 72*4882a593Smuzhiyun #define IO_BASE_SIZE 0x4000 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* Root Complex Base Address */ 75*4882a593Smuzhiyun #define RCBA_BASE_ADDRESS 0xfed1c000 76*4882a593Smuzhiyun #define RCBA_BASE_SIZE 0x400 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* MODPHY */ 79*4882a593Smuzhiyun #define MPHY_BASE_ADDRESS 0xfef00000 80*4882a593Smuzhiyun #define MPHY_BASE_SIZE 0x100000 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* IO Port bases */ 83*4882a593Smuzhiyun #define ACPI_BASE_ADDRESS 0x0400 84*4882a593Smuzhiyun #define ACPI_BASE_SIZE 0x80 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #define PM1_STS 0x00 87*4882a593Smuzhiyun #define PM1_CNT 0x04 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #define GPIO_BASE_ADDRESS 0x0500 90*4882a593Smuzhiyun #define GPIO_BASE_SIZE 0x100 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define SMBUS_BASE_ADDRESS 0xefa0 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #endif /* _BAYTRAIL_IOMAP_H_ */ 95