1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef __ASM_ACPI_S3_H__
8*4882a593Smuzhiyun #define __ASM_ACPI_S3_H__
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #define WAKEUP_BASE 0x600
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /* PM1_STATUS register */
13*4882a593Smuzhiyun #define WAK_STS (1 << 15)
14*4882a593Smuzhiyun #define PCIEXPWAK_STS (1 << 14)
15*4882a593Smuzhiyun #define RTC_STS (1 << 10)
16*4882a593Smuzhiyun #define SLPBTN_STS (1 << 9)
17*4882a593Smuzhiyun #define PWRBTN_STS (1 << 8)
18*4882a593Smuzhiyun #define GBL_STS (1 << 5)
19*4882a593Smuzhiyun #define BM_STS (1 << 4)
20*4882a593Smuzhiyun #define TMR_STS (1 << 0)
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* PM1_CNT register */
23*4882a593Smuzhiyun #define SLP_EN (1 << 13)
24*4882a593Smuzhiyun #define SLP_TYP_SHIFT 10
25*4882a593Smuzhiyun #define SLP_TYP (7 << SLP_TYP_SHIFT)
26*4882a593Smuzhiyun #define SLP_TYP_S0 0
27*4882a593Smuzhiyun #define SLP_TYP_S1 1
28*4882a593Smuzhiyun #define SLP_TYP_S3 5
29*4882a593Smuzhiyun #define SLP_TYP_S4 6
30*4882a593Smuzhiyun #define SLP_TYP_S5 7
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* Memory size reserved for S3 resume */
33*4882a593Smuzhiyun #define S3_RESERVE_SIZE 0x1000
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #ifndef __ASSEMBLY__
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun extern char __wakeup[];
38*4882a593Smuzhiyun extern int __wakeup_size;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun enum acpi_sleep_state {
41*4882a593Smuzhiyun ACPI_S0,
42*4882a593Smuzhiyun ACPI_S1,
43*4882a593Smuzhiyun ACPI_S2,
44*4882a593Smuzhiyun ACPI_S3,
45*4882a593Smuzhiyun ACPI_S4,
46*4882a593Smuzhiyun ACPI_S5,
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /**
50*4882a593Smuzhiyun * acpi_ss_string() - get ACPI-defined sleep state string
51*4882a593Smuzhiyun *
52*4882a593Smuzhiyun * @pm1_cnt: ACPI-defined sleep state
53*4882a593Smuzhiyun * @return: a pointer to the sleep state string.
54*4882a593Smuzhiyun */
acpi_ss_string(enum acpi_sleep_state state)55*4882a593Smuzhiyun static inline char *acpi_ss_string(enum acpi_sleep_state state)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun char *ss_string[] = { "S0", "S1", "S2", "S3", "S4", "S5"};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun return ss_string[state];
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /**
63*4882a593Smuzhiyun * acpi_sleep_from_pm1() - get ACPI-defined sleep state from PM1_CNT register
64*4882a593Smuzhiyun *
65*4882a593Smuzhiyun * @pm1_cnt: PM1_CNT register value
66*4882a593Smuzhiyun * @return: ACPI-defined sleep state if given valid PM1_CNT register value,
67*4882a593Smuzhiyun * -EINVAL otherwise.
68*4882a593Smuzhiyun */
acpi_sleep_from_pm1(u32 pm1_cnt)69*4882a593Smuzhiyun static inline enum acpi_sleep_state acpi_sleep_from_pm1(u32 pm1_cnt)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun switch ((pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) {
72*4882a593Smuzhiyun case SLP_TYP_S0:
73*4882a593Smuzhiyun return ACPI_S0;
74*4882a593Smuzhiyun case SLP_TYP_S1:
75*4882a593Smuzhiyun return ACPI_S1;
76*4882a593Smuzhiyun case SLP_TYP_S3:
77*4882a593Smuzhiyun return ACPI_S3;
78*4882a593Smuzhiyun case SLP_TYP_S4:
79*4882a593Smuzhiyun return ACPI_S4;
80*4882a593Smuzhiyun case SLP_TYP_S5:
81*4882a593Smuzhiyun return ACPI_S5;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return -EINVAL;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /**
88*4882a593Smuzhiyun * chipset_prev_sleep_state() - Get chipset previous sleep state
89*4882a593Smuzhiyun *
90*4882a593Smuzhiyun * This returns chipset previous sleep state from ACPI registers.
91*4882a593Smuzhiyun * Platform codes must supply this routine in order to support ACPI S3.
92*4882a593Smuzhiyun *
93*4882a593Smuzhiyun * @return ACPI_S0/S1/S2/S3/S4/S5.
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun enum acpi_sleep_state chipset_prev_sleep_state(void);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /**
98*4882a593Smuzhiyun * chipset_clear_sleep_state() - Clear chipset sleep state
99*4882a593Smuzhiyun *
100*4882a593Smuzhiyun * This clears chipset sleep state in ACPI registers.
101*4882a593Smuzhiyun * Platform codes must supply this routine in order to support ACPI S3.
102*4882a593Smuzhiyun */
103*4882a593Smuzhiyun void chipset_clear_sleep_state(void);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun struct acpi_fadt;
106*4882a593Smuzhiyun /**
107*4882a593Smuzhiyun * acpi_resume() - Do ACPI S3 resume
108*4882a593Smuzhiyun *
109*4882a593Smuzhiyun * This calls U-Boot wake up assembly stub and jumps to OS's wake up vector.
110*4882a593Smuzhiyun *
111*4882a593Smuzhiyun * @fadt: FADT table pointer in the ACPI table
112*4882a593Smuzhiyun * @return: Never returns
113*4882a593Smuzhiyun */
114*4882a593Smuzhiyun void acpi_resume(struct acpi_fadt *fadt);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /**
117*4882a593Smuzhiyun * acpi_s3_reserve() - Reserve memory for ACPI S3 resume
118*4882a593Smuzhiyun *
119*4882a593Smuzhiyun * This copies memory where real mode interrupt handler stubs reside to the
120*4882a593Smuzhiyun * reserved place on the stack.
121*4882a593Smuzhiyun *
122*4882a593Smuzhiyun * This routine should be called by reserve_arch() before U-Boot is relocated
123*4882a593Smuzhiyun * when ACPI S3 resume is enabled.
124*4882a593Smuzhiyun *
125*4882a593Smuzhiyun * @return: 0 always
126*4882a593Smuzhiyun */
127*4882a593Smuzhiyun int acpi_s3_reserve(void);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun #endif /* __ASM_ACPI_S3_H__ */
132