xref: /OK3568_Linux_fs/u-boot/arch/x86/dts/u-boot.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (C) 2016 Google, Inc
3*4882a593Smuzhiyun * Written by Simon Glass <sjg@chromium.org>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include <config.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#ifdef CONFIG_ROM_SIZE
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	binman {
13*4882a593Smuzhiyun		filename = "u-boot.rom";
14*4882a593Smuzhiyun		end-at-4gb;
15*4882a593Smuzhiyun		sort-by-pos;
16*4882a593Smuzhiyun		pad-byte = <0xff>;
17*4882a593Smuzhiyun		size = <CONFIG_ROM_SIZE>;
18*4882a593Smuzhiyun#ifdef CONFIG_HAVE_INTEL_ME
19*4882a593Smuzhiyun		intel-descriptor {
20*4882a593Smuzhiyun			filename = CONFIG_FLASH_DESCRIPTOR_FILE;
21*4882a593Smuzhiyun		};
22*4882a593Smuzhiyun		intel-me {
23*4882a593Smuzhiyun			filename = CONFIG_INTEL_ME_FILE;
24*4882a593Smuzhiyun		};
25*4882a593Smuzhiyun#endif
26*4882a593Smuzhiyun#ifdef CONFIG_SPL
27*4882a593Smuzhiyun		u-boot-spl-with-ucode-ptr {
28*4882a593Smuzhiyun			pos = <CONFIG_SPL_TEXT_BASE>;
29*4882a593Smuzhiyun		};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		u-boot-dtb-with-ucode2 {
32*4882a593Smuzhiyun			type = "u-boot-dtb-with-ucode";
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun		u-boot {
35*4882a593Smuzhiyun			pos = <0xfff00000>;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun#else
38*4882a593Smuzhiyun		u-boot-with-ucode-ptr {
39*4882a593Smuzhiyun			pos = <CONFIG_SYS_TEXT_BASE>;
40*4882a593Smuzhiyun		};
41*4882a593Smuzhiyun#endif
42*4882a593Smuzhiyun		u-boot-dtb-with-ucode {
43*4882a593Smuzhiyun		};
44*4882a593Smuzhiyun		u-boot-ucode {
45*4882a593Smuzhiyun			align = <16>;
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun#ifdef CONFIG_HAVE_MRC
48*4882a593Smuzhiyun		intel-mrc {
49*4882a593Smuzhiyun			pos = <CONFIG_X86_MRC_ADDR>;
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun#endif
52*4882a593Smuzhiyun#ifdef CONFIG_HAVE_FSP
53*4882a593Smuzhiyun		intel-fsp {
54*4882a593Smuzhiyun			filename = CONFIG_FSP_FILE;
55*4882a593Smuzhiyun			pos = <CONFIG_FSP_ADDR>;
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun#endif
58*4882a593Smuzhiyun#ifdef CONFIG_HAVE_CMC
59*4882a593Smuzhiyun		intel-cmc {
60*4882a593Smuzhiyun			filename = CONFIG_CMC_FILE;
61*4882a593Smuzhiyun			pos = <CONFIG_CMC_ADDR>;
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun#endif
64*4882a593Smuzhiyun#ifdef CONFIG_HAVE_VGA_BIOS
65*4882a593Smuzhiyun		intel-vga {
66*4882a593Smuzhiyun			filename = CONFIG_VGA_BIOS_FILE;
67*4882a593Smuzhiyun			pos = <CONFIG_VGA_BIOS_ADDR>;
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun#endif
70*4882a593Smuzhiyun#ifdef CONFIG_HAVE_REFCODE
71*4882a593Smuzhiyun		intel-refcode {
72*4882a593Smuzhiyun			pos = <CONFIG_X86_REFCODE_ADDR>;
73*4882a593Smuzhiyun		};
74*4882a593Smuzhiyun#endif
75*4882a593Smuzhiyun#ifdef CONFIG_SPL
76*4882a593Smuzhiyun		x86-start16-spl {
77*4882a593Smuzhiyun			pos = <CONFIG_SYS_X86_START16>;
78*4882a593Smuzhiyun		};
79*4882a593Smuzhiyun#else
80*4882a593Smuzhiyun		x86-start16 {
81*4882a593Smuzhiyun			pos = <CONFIG_SYS_X86_START16>;
82*4882a593Smuzhiyun		};
83*4882a593Smuzhiyun#endif
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun};
86*4882a593Smuzhiyun#endif
87