1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/include/ "skeleton.dtsi" 10*4882a593Smuzhiyun/include/ "serial.dtsi" 11*4882a593Smuzhiyun/include/ "keyboard.dtsi" 12*4882a593Smuzhiyun/include/ "rtc.dtsi" 13*4882a593Smuzhiyun/include/ "tsc_timer.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "Intel Cougar Canyon 2"; 17*4882a593Smuzhiyun compatible = "intel,cougarcanyon2", "intel,chiefriver"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun aliases { 20*4882a593Smuzhiyun spi0 = &spi0; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun config { 24*4882a593Smuzhiyun silent_console = <0>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun chosen { 28*4882a593Smuzhiyun stdout-path = "/serial"; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun microcode { 32*4882a593Smuzhiyun update@0 { 33*4882a593Smuzhiyun#include "microcode/m12306a2_00000008.dtsi" 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun update@1 { 36*4882a593Smuzhiyun#include "microcode/m12306a4_00000007.dtsi" 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun update@2 { 39*4882a593Smuzhiyun#include "microcode/m12306a5_00000007.dtsi" 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun update@3 { 42*4882a593Smuzhiyun#include "microcode/m12306a8_00000010.dtsi" 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun update@4 { 45*4882a593Smuzhiyun#include "microcode/m12306a9_0000001b.dtsi" 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun fsp { 50*4882a593Smuzhiyun compatible = "intel,ivybridge-fsp"; 51*4882a593Smuzhiyun fsp,enable-ht; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun pci { 55*4882a593Smuzhiyun #address-cells = <3>; 56*4882a593Smuzhiyun #size-cells = <2>; 57*4882a593Smuzhiyun compatible = "pci-x86"; 58*4882a593Smuzhiyun u-boot,dm-pre-reloc; 59*4882a593Smuzhiyun ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 60*4882a593Smuzhiyun 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 61*4882a593Smuzhiyun 0x01000000 0x0 0x2000 0x2000 0 0xe000>; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun pch@1f,0 { 64*4882a593Smuzhiyun reg = <0x0000f800 0 0 0 0>; 65*4882a593Smuzhiyun compatible = "intel,bd82x6x"; 66*4882a593Smuzhiyun u-boot,dm-pre-reloc; 67*4882a593Smuzhiyun #address-cells = <1>; 68*4882a593Smuzhiyun #size-cells = <1>; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun spi0: spi { 71*4882a593Smuzhiyun #address-cells = <1>; 72*4882a593Smuzhiyun #size-cells = <0>; 73*4882a593Smuzhiyun compatible = "intel,ich9-spi"; 74*4882a593Smuzhiyun spi-flash@0 { 75*4882a593Smuzhiyun reg = <0>; 76*4882a593Smuzhiyun compatible = "winbond,w25q64bv", "spi-flash"; 77*4882a593Smuzhiyun memory-map = <0xff800000 0x00800000>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun gpioa { 82*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 83*4882a593Smuzhiyun u-boot,dm-pre-reloc; 84*4882a593Smuzhiyun reg = <0 0x10>; 85*4882a593Smuzhiyun bank-name = "A"; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun gpiob { 89*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 90*4882a593Smuzhiyun u-boot,dm-pre-reloc; 91*4882a593Smuzhiyun reg = <0x30 0x10>; 92*4882a593Smuzhiyun bank-name = "B"; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun gpioc { 96*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 97*4882a593Smuzhiyun u-boot,dm-pre-reloc; 98*4882a593Smuzhiyun reg = <0x40 0x10>; 99*4882a593Smuzhiyun bank-name = "C"; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun}; 105