1*4882a593Smuzhiyun/dts-v1/; 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/include/ "skeleton.dtsi" 4*4882a593Smuzhiyun/include/ "serial.dtsi" 5*4882a593Smuzhiyun/include/ "rtc.dtsi" 6*4882a593Smuzhiyun/include/ "tsc_timer.dtsi" 7*4882a593Smuzhiyun/include/ "coreboot_fb.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "Google Panther"; 11*4882a593Smuzhiyun compatible = "google,panther", "intel,haswell"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun aliases { 14*4882a593Smuzhiyun spi0 = &spi; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun config { 18*4882a593Smuzhiyun silent-console = <0>; 19*4882a593Smuzhiyun no-keyboard; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun chosen { 23*4882a593Smuzhiyun stdout-path = "/serial"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun pci { 27*4882a593Smuzhiyun compatible = "pci-x86"; 28*4882a593Smuzhiyun #address-cells = <3>; 29*4882a593Smuzhiyun #size-cells = <2>; 30*4882a593Smuzhiyun u-boot,dm-pre-reloc; 31*4882a593Smuzhiyun ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 32*4882a593Smuzhiyun 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 33*4882a593Smuzhiyun 0x01000000 0x0 0x1000 0x1000 0 0xf000>; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun pch@1f,0 { 36*4882a593Smuzhiyun reg = <0x0000f800 0 0 0 0>; 37*4882a593Smuzhiyun compatible = "intel,pch9"; 38*4882a593Smuzhiyun #address-cells = <1>; 39*4882a593Smuzhiyun #size-cells = <1>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun spi: spi { 42*4882a593Smuzhiyun #address-cells = <1>; 43*4882a593Smuzhiyun #size-cells = <0>; 44*4882a593Smuzhiyun compatible = "intel,ich9-spi"; 45*4882a593Smuzhiyun spi-flash@0 { 46*4882a593Smuzhiyun #size-cells = <1>; 47*4882a593Smuzhiyun #address-cells = <1>; 48*4882a593Smuzhiyun reg = <0>; 49*4882a593Smuzhiyun compatible = "winbond,w25q64", 50*4882a593Smuzhiyun "spi-flash"; 51*4882a593Smuzhiyun memory-map = <0xff800000 0x00800000>; 52*4882a593Smuzhiyun rw-mrc-cache { 53*4882a593Smuzhiyun label = "rw-mrc-cache"; 54*4882a593Smuzhiyun reg = <0x003e0000 0x00010000>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun gpioa { 60*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 61*4882a593Smuzhiyun u-boot,dm-pre-reloc; 62*4882a593Smuzhiyun reg = <0 0x10>; 63*4882a593Smuzhiyun bank-name = "A"; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun gpiob { 67*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 68*4882a593Smuzhiyun u-boot,dm-pre-reloc; 69*4882a593Smuzhiyun reg = <0x30 0x10>; 70*4882a593Smuzhiyun bank-name = "B"; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun gpioc { 74*4882a593Smuzhiyun compatible = "intel,ich6-gpio"; 75*4882a593Smuzhiyun u-boot,dm-pre-reloc; 76*4882a593Smuzhiyun reg = <0x40 0x10>; 77*4882a593Smuzhiyun bank-name = "C"; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun tpm { 83*4882a593Smuzhiyun reg = <0xfed40000 0x5000>; 84*4882a593Smuzhiyun compatible = "infineon,slb9635lpc"; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun}; 88